47 results about "Memory scheduling" patented technology

The invention discloses a smart tea garden resource dynamic scheduling system and method integrated with environment monitoring, and the method comprises the following steps: S1, collecting environment and operation data, processing the environment and operation data, and generating a standardized data set; s2, carrying out discrete modeling and environment field generation, carrying out topological analysis on humidity and pest and disease damage intensity, judging abnormity and triggering local scheduling; s3, generating a task, resource and environment set, constructing a task-resource-environment hypergraph, establishing a time expansion graph and forming constraints; s4, dynamic game solving is introduced, and a scheduling scheme and a control instruction are generated; s5, issuing an instruction to an execution end, collecting an execution state and environment data, and forming a feedback data set; and S6, constructing a double-layer memory scheduling unit, and generating a parameter set of a next period. According to the invention, precise allocation and efficient management and control of tea garden resources are realized by fusing environmental monitoring and dynamic scheduling, so that the production efficiency is improved and ecological sustainability is guaranteed.

The invention discloses an intelligent customer service dialogue management method and system fused with multi-layer memory, and belongs to the technical field of computers, and the method obtains a three-dimensional context through multi-mode context awareness, achieves the dynamic scheduling of a memory system through a memory coordinator, and combines a dynamic construction mechanism of a service situation portrait, thereby achieving the intelligent customer service dialogue management. The problem that the response of the intelligent customer service system is not matched with the complex and dynamic service demand of the user due to the single situation awareness dimension and the rigid memory scheduling mechanism is effectively solved, and the adaptive personalized service response can be generated according to the real-time change of the dialogue situation.

The invention relates to the technical field of artificial intelligence, can be applied to the medical field and the financial science and technology field, and discloses a dialogue method and device based on a memory scheduling framework, equipment and a medium, which are applied to a bank virtual customer service scene or an intelligent triage and pre-inquiry scene. Obtaining a target dialogue page from all dialogue pages of the current dialogue chain in the short-term memory queue; a target topic segment and a target dialogue page are retrieved from the medium-term memory module, and target feature information is retrieved from the long-term personalized memory module; constructing a structured cue word, and generating a target response based on the structured cue word; storing the newly constructed dialogue page in a short-term memory queue; if the short-term memory queue is full, removing the dialogue page from the head of the queue; updating the topic segment in the medium-term memory module based on the removed dialogue page; and updating the long-term personalized memory module according to the popularity of the topic segment in the updated middle-term memory module. The dialogue response accuracy is improved.

The invention discloses a robot training system and method based on plot memory in the technical field of artificial intelligence and robot learning, and solves the problems that an existing robot training method lacks an effective memory scheduling system, an empirical value quantification mechanism is not intelligent, and the multi-modal information fusion capability is insufficient. The system comprises a sensing module, a multi-modal unified memory encoder, a progressive memory scheduling system, a multi-dimensional value quantitative evaluation mechanism, an intelligent experience hierarchical scheduler, a multi-modal unified code retriever, a strategy generation module, an execution module and an anomaly detection module. The multi-modal unified memory encoder adopts a hierarchical dimensionality reduction Transform architecture, and fuses an RGB image, a depth image, force sensor data and joint angle information into a 576-dimensional unified feature vector; the progressive memory scheduling system comprises a working memory structure, a short-term memory structure and a long-term memory structure. The multi-dimensional value quantitative evaluation mechanism carries out quantitative scoring on experience based on reward evaluation, novelty evaluation and uncertainty evaluation.

Embodiments of the invention disclose a neural network model deployment-oriented memory management method and apparatus, and a medium. The method comprises the following steps: analyzing a trained and to-be-deployed deep learning model as required to obtain a calculation graph; according to a mode, splitting the calculation subgraphs into a plurality of calculation subgraphs; selecting a memory management strategy to obtain a sub-graph memory scheduling scheme; and integrating the data to obtain an overall memory scheduling scheme. By implementing the memory management scheme provided by the embodiment of the invention, the calculation graph is segmented and divided into the plurality of calculation sub-graphs, and different memory management strategies are used for the calculation sub-graphs to obtain the local optimal memory management scheme, so that the search space of memory scheduling is increased, and the memory scheduling efficiency is improved. Therefore, a global memory management scheme which is better than that using a single strategy is obtained, the memory occupation amount of deep learning is reduced, the utilization rate of chip memory resources is improved, and a user can deploy a more complex deep learning model on the premise that chip configuration is not changed.

This invention discloses a method and system for dynamic visual analysis of oxygen-consuming pollutants across multiple interfaces in watersheds. Addressing bottlenecks in large-scale rendering of complex watershed hydrology, such as GPU memory overflow, lack of cross-interface flux representation, and difficulty in perceiving prediction errors, this invention acquires a multi-source heterogeneous spatiotemporal sequence set of water quality data; constructs a topological directed acyclic graph (DAG) based on Strahler hierarchy in memory, and performs online hierarchical temporal aggregation algorithm in the GPU for dynamic LOD memory scheduling; generates a three-dimensional cross-medium particle streamline flux layer using Runge-Kutta numerical integration and pollution degradation constant constraints; and extracts the prediction variance field using a regularized multi-decoder scene representation network (RMDSRN), mapping it to the physical geometric roughness and fogging effects of the water surface mesh. This invention achieves hardware-level isomorphism between geographical laws and low-level memory scheduling, intuitively presenting hidden physical flux interactions and deep AI-predicted risks, significantly improving the scientific rigor and hardware / software efficiency of watershed management.

The invention provides a large model parameter scheduling method, a large model parameter reasoning method, a large model parameter scheduling device, a large model parameter reasoning device and electronic equipment. The method comprises the following steps: acquiring an input feature of a current layer transformer module; the input feature is the feature output by the former layer of transformer module; the input features are analyzed through a parameter prediction model corresponding to the current layer transformer module, and a target expert model needed by reasoning of the next layer transformer module is obtained; if it is judged that target model parameters need to be scheduled based on the target expert model, a parameter scheduling strategy is generated; and scheduling the target model parameters of the target expert model from the CPU memory to the GPU memory according to the parameter scheduling strategy. According to the method and the device, the target expert model required by reasoning of the next layer of transformer module is obtained through the parameter prediction model, and the target model parameters are scheduled from the CPU to the GPU, so that the occupation of a GPU memory is reduced.

The present application relates to the technical field of memory management, and discloses a memory management method for a multi-core system, a multi-core system, a device, and a medium. The method comprises: a master core unit marking initial memory management priorities of the master core unit and slave core units as a second level, the memory management priorities further comprising: a first level higher than the second level and a third level lower than the second level; determining a system operating condition; on the basis of the system operating condition and the second level, updating and determining current memory management priorities of the master core unit and the slave core units; and on the basis of a memory scheduling and allocation request sent by an applicant, the system operating condition, the type of the applicant, and a current memory management priority of the applicant, a memory manager performing memory scheduling and allocation processing, and allocating an idle memory unit to the applicant, so that the applicant executes a task in a task queue, the applicant being the master core unit or one of the slave core units. The present application can improve system memory utilization rate and ensure efficient and correct operation of the multi-core system.

The invention belongs to the technical field of memory scheduling. The invention discloses a memory scheduling and application acceleration method for an end-side heavy load scene. According to the embodiment of the invention, in a cold start process oriented to GB-level large-scale applications, in a multi-task scene of a mobile terminal, a vehicle-mounted terminal and the like, by uniformly scheduling a selective file preloading module, a self-adaptive memory recovery module and a context-aware process termination module, on the premise that application program codes are not modified, the application program codes can be quickly and efficiently started, and the application program codes can be quickly and efficiently started. The method comprises the following steps: modeling a file access mode and page type characteristics related to cold start, dynamically adjusting a preload object, a recovery strategy and a process termination sequence based on a preload memory budget and real-time memory pressure, preferentially retaining a key preload page, and selecting a background application with a relatively high net releasable memory and a relatively low short-term restart probability to terminate; and collaborative optimization of the cold start time delay and the background survivability under the constraint of the limited memory and the I / O bandwidth is realized.

The invention relates to a computer-implemented method for performing memory planning for code generation to determine a code for the computation of a neural network in a hardware environment (2), comprising the following steps: - Providing (S1) successive computation steps of the neural network, wherein several of the computation steps provide for the computation of a weight prefetching layer for which weight prefetching is applicable; - Assigning (S3) a possible weight prefetching to at least some of the multiple weight prefetching layers to obtain several different combinations of weight prefetching layers, wherein the weight prefetching involves preloading network parameters into a working memory of the hardware environment for the respective weight prefetching layer; - Performing (S4) memory planning for the code to be created for the several different combinations, wherein the respective memory planning for the successive computation steps of the neural network is carried out taking into account the respective combination of the weight prefetching layers for which weight prefetching is provided, wherein for the respective memory planning for each computation step the memory area of ​​the respective input data block, output data block and at least one network parameter block in main memory is determined and a maximum required memory space of main memory is determined; - Select (S5) one of the memory schedules depending on the maximum required memory space.

The present application relates to the technical field of multi-core heterogeneous computing, and discloses a storage coherent hub chip based on core integration, a storage coherent arbitration device and an adaptive control method, aiming to solve the technical problems of high cross-core memory access latency, low coupling degree of cache coherence maintenance and memory scheduling, and slow response of operation strategy adjustment under the existing multi-core architecture. The present application takes an independently packaged storage coherent core as a globally consistent unique maintenance node, integrates a single-cycle static addressing architecture, adopts a cache coherence state machine and a memory scheduling controller with deep fusion of logic layers, realizes automatic switching between robust mode and aggressive mode through a pure hardware MHM monitoring unit, and the atomic withdrawal process is transparent to the upper layer. The present application can reduce the cross-core memory access latency by more than 40%, improve the storage access throughput by 25%, while guaranteeing 99.999% operation reliability, adapting to various heterogeneous interconnection protocols, and being applicable to various application scenarios such as servers, high-frequency financial transactions, AR / VR wearable devices, edge computing, etc.

This invention discloses a dynamic memory scheduling method and apparatus for an industrial control terminal collaborative response system. The method includes creating a free linked list block based on the memory space status of the industrial control terminal collaborative response system; when a process requests memory space, allocating a free memory block to the process using a pre-set algorithm; when a free memory block is allocated to the requesting process, tracking ownership of the code segment, data segment, and stack segment; and when the process finishes running, releasing the memory and reclaiming ownership of the memory address space occupied by the process. This method, based on the ownership mechanism and type-safe language features of the system programming language Rust, designs a memory storage manager, achieving performance and reliability assurance for dynamic memory scheduling, and improving the overall operating performance and security of the industrial control terminal collaborative response system.

A memory scheduling device includes a pre-processing storage, a selector, a current storage, and an arbiter. The pre-processing storage provides a plurality of main commands and a plurality of secondary commands. The selector selects the main commands and / or the secondary commands based on a selection signal. The current storage receives the main commands and / or the secondary commands transmitted from the selector. The arbiter precomputes a predict burst length corresponding to the main commands expected to be received by the current storage based on a round-robin sequence. If the predict burst length corresponding to the main commands is less than a threshold burst length, the arbiter transmits the selection signal to the selector, such that the pre-processing storage transmits a portion of main commands and at least one secondary command of the secondary commands to the current storage through the selector.

The invention discloses a security system for dynamic encryption transmission and a transmission method, relates to the technical field of memory encryption, and aims to solve the problems of static encryption defects, insufficient key management and dynamic protection deficiency in a memory encryption process. Comprising a host system, an intelligent memory scheduling module, a dynamic key management module, a protocol stack encryption engine and an anti-attack protection module. Wherein the host system generates original data; the security policy scheduling module classifies the original data; the intelligent memory scheduling module divides the memory and receives classification data; the dynamic key management module dynamically generates a session key; the protocol stack encryption engine encrypts transmission data by using the session key, and sends an encrypted data packet through a physical network; and the anti-attack protection module provides attack protection for a system encryption transmission full link. According to the invention, the dynamic nature of the secret key and the intellectualization of memory management are realized, the anti-attack capability is improved by means of the anti-attack protection module, and the security of the system is greatly improved.

The invention discloses an intelligent memory scheduling method and device, electronic equipment and a storage medium, and relates to the technical field of memory scheduling and task management. The method comprises the following steps: acquiring data information of a current task, constructing an access mode database, and mapping an access mode into a preset task semantic category by adopting a task semantic classifier; according to the state information of the candidate memory channel, calculating an affinity score of the task semantic category and the candidate memory channel; calculating the priority of the current task through the multi-dimensional features according to the task semantic category of the current task and the user configuration information; according to the load conditions of the candidate memory channels, the target memory channel is allocated for the current task, and memory scheduling of the current task is completed. The method achieves precision and differentiation of memory scheduling, can adapt to service characteristics and resource requirements of different tasks, flexibly adjusts a scheduling strategy according to the system state, and improves the scheduling efficiency. And the utilization efficiency of memory resources is effectively improved.

The invention provides a memory scheduling method and device, electronic equipment, a medium and a program product, and relates to the technical field of computers. The memory scheduling method comprises the steps of dividing memory hierarchies for the hybrid memory system on the basis of a performance index of a far-end memory; dynamically scanning the container based on the attribute of the memory data in the container to obtain a container access heat map; configuring a cold and hot threshold value of the container for the importance weight allocated to the container and the memory hierarchy based on the container access heat map; and performing memory page scheduling on the container based on the cold and hot threshold and the container access heat map. According to the technical scheme, scheduling of the memory page in the container gives consideration to data heat, container importance and dynamic data features, and rationality of cold and hot scheduling of the memory page is improved while global scheduling of the memory page is achieved.

The invention belongs to the technical field of large-scale deep learning model training, and particularly relates to a video memory scheduling system based on dynamic sequence length assembly line parallel training. The system comprises a dynamic recalculation module, a video memory arrangement and prefetching module and a mapping reconstruction module, the system collects the length and load information of each micro-batch before each round of iteration, establishes an optimization model with the goal of minimizing the iteration time, dynamically generates a re-calculation plan, and realizes inter-stage video memory load balancing; by introducing a collating stream and an asynchronous scheduler outside a main computing stream, overlapping execution of video memory collating and computing prefetching is realized, and the influence of fragment collating on training performance is reduced; a dynamic physical block mapping strategy is designed based on a CUDA virtual memory management mechanism, the physical block granularity is adaptively adjusted according to the idle state of the video memory, and the API calling and context switching overhead is reduced. Experimental results show that the video memory utilization rate and the system stability are remarkably improved, and an efficient video memory scheduling scheme is provided for large model training.

A memory management method includes receiving, by a first operating system, a memory scheduling request sent by at least one second operating system through an inter-core communication channel, determining, by the first operating system, a target memory priority of each second processor corresponding to the second operating system based on the memory scheduling request, and assigning, by the first operating system, a memory bandwidth to the second operating system based on the target memory priority of the second processor. The memory scheduling request is used to request a memory bandwidth required by the second operating system. Each operating system is configured to run on a hardware set of a system-on-chip (SoC).

The invention discloses a large-scale spatio-temporal data hierarchical loading and display method, device, medium and product, and relates to the technical field of data processing and geographic information visualization, the method comprises the following steps: obtaining network security situation data, calculating the display level of each node data based on node attribute criticality, calculating the number of a patch where each node data is located based on the plane subdivision of the graticule; performing visual data organization and dynamic scheduling on the subdivided data by adopting a memory pool based on the display level and the patch number; based on the GIS, loading and drawing of scene nodes are carried out on the data after dynamic scheduling in a multi-thread mode, and the state of the scene nodes is updated through collision detection in the rendering display process. According to the method and the device, the phenomena of memory pressure, operation lagging and'lump 'overlapping caused by simultaneous loading of massive nodes are solved, efficient memory scheduling and layered and fragmented visualization of large-scale network situation data are realized, and the visual experience of a user is improved.

The embodiment of the invention provides a large language model processing system and a session processing method. The system comprises a management node for deploying a scheduler, a computing node and a storage node, the scheduler is connected with the storage node, and the storage node is used for directly performing data interaction with a hardware accelerator memory of the computing node; the scheduler is used for receiving a session request, the session request is a multi-round session request, and an acquisition instruction is sent to the storage node; the storage node is used for acquiring a KV Cache of the session request and caching the KV Cache to a first memory of the storage node; the scheduler is also used for sending the session request to the computing node; and the computing node is used for obtaining the KV Cache from the first memory of the storage node after obtaining the session request, and processing the session request by using the KV Cache, so that transmission delay caused by obtaining the KV Cache across the computing nodes can be eliminated, the waiting time of the computing nodes is reduced, and the utilization rate of the hardware accelerator is improved.

The invention discloses a dynamic memory resource scheduling-based sandbox platform technical method and system for sharing nodes by Kubernetes and OpenStack, and belongs to the technical field of cloud computing, and the method comprises the following steps of: acquiring a global memory state from an OVN controller by developing an OVN scheduling module, cooperatively managing memory allocation of an OpenStack sandbox and the Kubernetes sandbox based on a unified strategy, and managing the memory allocation of the OpenStack sandbox and the Kubernetes sandbox. Comprising a memory scheduling process combined with sandbox business logic and a memory scheduling process combined with K8s business logic, so that accurate scheduling of dynamic memory resources is realized, and the memory use efficiency is improved.

The present application relates to the technical field of cloud services, and discloses a public cloud technology-based memory management method and system. The method comprises: acquiring a real-time usage status of memory of a first server, the first server being one of a plurality of servers; obtaining a memory scheduling policy of the first server on the basis of the real-time usage status of the memory of the first server, wherein the memory scheduling policy is used for indicating one or more of the following: allocating memory of one or more second servers to the first server for use, canceling the allocation of memory of one or more second servers to the first server for use, and canceling the allocation of the memory of the first server to one or more second servers for use, and the second server is one of the plurality of servers other than the first server; and on the basis of the memory scheduling policy, scheduling memory for the first server. The present application improves the memory utilization of servers.

The embodiment of the invention discloses a data processing task scheduling method and device, electronic equipment and a medium. A specific embodiment of the method comprises the steps of obtaining a memory capacity set required by task operation and memory capacity of an application server; generating the current required memory capacity; determining a task execution mode; performing memory scheduling on the current data processing task and the target data processing task set to obtain task scheduling information; executing the current data processing task and the target data processing task set to obtain task execution information; in response to determining that the task execution information represents execution abnormity, performing memory leak detection on the task execution information to obtain a task memory detection result; and according to a task memory detection result, performing memory resource recovery on required memories corresponding to the current data processing task and the target data processing task set. According to the embodiment, smooth execution of the data processing task can be improved, waste of memory resources is reduced, and the stability of a system for executing the data processing task is improved.

A computer-implemented method for performing memory scheduling for code generation to determine a code for computing a neural network in a hardware environment includes (i) providing successive computation steps of the neural network, wherein a plurality of the computation steps provide for the computation of a weight prefetching layer for which weight prefetching is applicable, (ii) assigning possible weight prefetching to at least a portion of the plurality of weight-prefetching layers in order to obtain multiple different combinations of weight-prefetching layers, wherein the weight prefetching provides for preloading of network parameters into a working memory of the hardware environment for the respective weight-prefetching layer, (iii) performing memory scheduling for the code to be generated for the plurality of different combinations, wherein the respective memory scheduling is carried out for the successive computation steps of the neural network while taking into account the respective combination of weight-prefetching layers for which weight prefetching is provided, wherein for each memory scheduling, for every computation step, the memory region of the respective input data block, output data block, and at least one network parameter block in the working memory is defined, and a maximum required memory space of the working memory is ascertained, and (iv) selecting one of the memory schedulings depending on the maximum required memory space of the working memory.

The application provides a model training method and system based on reinforcement learning memory scheduling decision, the application is based on a reinforcement learning algorithm, analyzes training information generated in a training process, and updates a decision scheme according to feedback to determine which data to transfer, thereby further optimizing memory space and improving the overall performance of deep learning model training.

The application discloses a scenario memory-based robot training system and method in the technical field of artificial intelligence and robot learning, and solves problems of lack of effective memory scheduling system, non-intelligent experience value quantization mechanism and insufficient multi-modal information fusion capability in existing robot training methods.The system comprises a perception module, a multi-modal unified memory encoder, a progressive memory scheduling system, a multi-dimensional value quantization evaluation mechanism, an intelligent experience hierarchical scheduler, a multi-modal unified encoding retriever, a strategy generation module, an execution module and an anomaly detection module.The multi-modal unified memory encoder adopts a hierarchical dimension reduction Transformer architecture, and fuses an RGB image, a depth image, force sensor data and joint angle information into a 576-dimensional unified feature vector.The progressive memory scheduling system comprises a working memory, a short-term memory and a long-term memory three-layer structure.The multi-dimensional value quantization evaluation mechanism quantitatively scores experience based on reward evaluation, novelty evaluation and uncertainty evaluation.

This paper describes methods, systems, and devices for memory scheduling. More specifically, it describes techniques related to memory interfaces between a host system and memory (e.g., tightly coupled memory). For example, a memory interface block (MIB) between a host system and a memory system can schedule access operations, error control operations, media management operations, and other operations performed by the memory system. The use of such MIBs can improve the memory system by reducing latency and increasing the efficiency of memory access, while mitigating the impact on the host system's architecture and design.

This application discloses a control method, system, and device for dynamic adjustment of virtual GPU memory, relating to the field of computing power scheduling technology. The method includes: collecting the usage status of virtual GPU memory within a secure container; determining memory adjustment needs according to a preset resource adjustment strategy and generating corresponding instructions; parsing and locating the corresponding virtual GPU memory device and generating a memory scheduling strategy; adjusting the memory region of the device according to the scheduling strategy to obtain the target memory resources reconfigured at the hardware level; capturing the corresponding adjustment event, adjusting the address space resources accordingly, obtaining the reconstructed target memory pool, and mapping it to the dedicated isolated resource access domain of the corresponding secure container, thereby enabling applications within the secure container to access the target memory resources without being aware of them. This application solves the problem of low resource utilization by adjusting instructions, locating memory devices, generating scheduling strategies, and reconstructing the pool mapping resources, achieving efficient memory utilization and uninterrupted application services.

The invention relates to the technical field of artificial intelligence reasoning systems, in particular to a separated memory reasoning acceleration system based on multi-layer memory scheduling, which constructs a layered KV cache management system, divides a memory into a near-layer memory area, a middle-layer memory area and a far-layer memory area, and combines a dynamic scheduling mechanism to realize the multi-layer memory scheduling. The near-layer memory area is used for storing a high-frequency KV cache required by a current task, and has the characteristics of real-time performance and low latency; the middle-layer memory area is used for storing task templates and can be shared and used among different tasks, the far-layer memory area is connected to an external semantic knowledge base and is used for retrieving related semantic fragments as supplementary contexts according to needs, and the central control module dynamically selects and combines effective KV information in the three-layer memory area according to semantic features and context states of input tasks, so that the task templates can be shared and used among the tasks. In combination with a multi-factor scoring function of dynamic weight adjustment, fine scheduling of cache resources is realized, and accuracy and high efficiency of various reasoning tasks are guaranteed.

The invention relates to the technical field of memory management, and discloses a flash memory controller and a memory management method based on the flash memory controller, according to the flash memory controller, a memory management system and a basic control system are integrated in parallel, core memory processing operation can be completed on a hardware layer without depending on a host side, repeated data transmission is reduced, and the memory management efficiency is improved. Delay, power consumption and bandwidth occupation are remarkably reduced, and the low-delay requirement of end-side equipment is met; the memory management system has an active memory management capability, can realize efficient, intelligent and collaborative memory management, and adapts to end-side and enterprise-level multi-scene requirements; the multi-modal embedding engine realizes semantic analysis and vectorization of memory data, the vector management unit and the knowledge graph management unit are bidirectionally associated to form a hybrid index to mine memory association, the memory scheduling unit coordinates interaction between each module and a host side, deep integration of a storage medium and the host side is realized, and interaction continuity and personalized depth are improved; the memory management engine can integrate dispersed memory and clean useless data.