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Information processing apparatus for efficient image processing

一种信息处理装置、图像处理的技术,应用在信息处理领域,能够解决图像质量降低、图像数据复杂、限制信息处理装置处理速度等问题

Active Publication Date: 2006-03-29
SONY INTERACTIVE ENTERTAINMENT INC
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0004] However, as the image data is complex and advanced, the image processing speed in the graphics processor limits the processing speed of the information processing device
As a multi-processor, the main processor must wait until the graphics processor finishes processing the image processing operation in order for the graphics processor to perform the image processing operation required by one of the tasks, and the user's operation in the game, etc. On the other hand, if the output video is a task that changes in real time, it may cause image quality degradation such as interruption of the moving image and loss of movie frames.

Method used

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  • Information processing apparatus for efficient image processing
  • Information processing apparatus for efficient image processing

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Experimental program
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no. 1 approach

[0022] figure 1 It is a block diagram showing the configuration of the information processing device 1000 according to the first embodiment of the present invention. The information processing device 1000 includes a graphics processor 100 , a main processor 200 and a main memory 50 . The information processing device 1000 is connected to the display device 500 , and outputs images and videos obtained as a result of processing by the main processor 200 and the graphics processor 100 . exist figure 1 Among them, each element described as a functional block that performs various processes can be configured by a CPU, a memory, or other LSI in terms of hardware. program to achieve. Therefore, those skilled in the art should understand that these functional blocks can be realized by only hardware, only software or their combination, and are not limited to one of them.

[0023] In this information processing device 1000 , an operating system (hereinafter abbreviated as OS) that p...

no. 2 approach

[0056] In the first embodiment, when the management processor 32 of the main processor 200 performs task switching, the image 3 In Step S2, the control-side task switching unit 64 sends a task switching request signal to the image processing-side task switching unit 74, but in this embodiment, instead of this step, a shared address steps. The structure of the information processing device 1000 and figure 1 and figure 2 same. The description here is the same as that in the first embodiment figure 2 function and image 3 different steps.

[0057] Figure 5 It is a block diagram showing the structure of the management processor 32 provided in the main processor 200, the control block 20 provided in the graphics processor 100, and the shared register 80 accessible to all of them in this embodiment. In addition to the first embodiment, the control-side task switching unit 64 of the management processor 32 also has a function of writing to the shared register 80 . Further...

no. 3 approach

[0062] In the first embodiment, the transfer of the drawing data from the main processor 200 to the graphics processor 100 is through each sub-processor 30 that processes the task that needs to perform the image processing and transfers the data to the main memory 50. Data is managed by the management processor 32.

[0063] In this embodiment, as shown in FIG. 6 , one sub-processor 30 controls the transfer of rendering data for image processing that occurs during the processing of tasks by the sub-processor 30 . In the figure, this sub-processor 30 is particularly referred to as a control processor, and in order to distinguish it from other sub-processors 30 , it is given a different reference numeral 31 . The drawing data to be transferred to the graphics processor 100 is temporarily transferred from the sub-processor 30 to the transfer control processor 31 (for example, arrow 86 ), and is appropriately transferred and processed by the transfer control processor 31 (for examp...

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Abstract

A plurality of sub-processors (30) and a management processor (32) process the first task. A graphic processor unit (100) executes image processing corresponding to the first task processed by the management processor (32). One of the sub-processors (30) performs a second task different from the first task. An image process related to the first task and originated in the sub-processor is accepted by the graphic processor unit (100) and associated first rendering data is transferred to the graphic processor unit (100). Meanwhile, when the need arises in the one of the sub-processors (30) for a second image process related to the second task, the one of the sub-processor (30) saves second rendering data for the second image process in a main memory (50). Subsequently, when the graphic processor unit (100) starts the second image process corresponding to the second task, the second rendering data is transferred from the main memory (50) to a graphic memory (10).

Description

technical field [0001] The present invention relates to information processing technology, in particular to information processing technology including image processing. Background technique [0002] With the development of computer image technology in recent years, image data output from information processing devices such as mainframe computers, personal computers, and game consoles has become more and more complex and advanced. Therefore, the information processing device is equipped with a dedicated graphics processor for image processing, unlike a main processor that performs normal arithmetic processing, and frees the main processor from image processing, thereby eliminating system overhead. [0003] In these information processing devices, in order to realize high-performance arithmetic processing, it is effective to configure the main processor with multiple processors. A multiprocessor time-divides tasks corresponding to a plurality of applications to determine an ...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06T1/20G06F9/38G06F9/48G06F15/16
CPCG06F9/544G06F2209/509G06F9/461G06T15/005G06F9/4843
Inventor 鹫津祥德
Owner SONY INTERACTIVE ENTERTAINMENT INC