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Memory device for serial transmission interface and error correction method thereof

A serial transmission and error correction technology, applied in the field of memory devices, can solve the problems of data transmission errors, inability to check and correct transmission errors of the SPI flash memory 100, etc.

Inactive Publication Date: 2006-09-27
SUNPLUS TECH CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

Between the master control terminal 150 and the SPI flash memory 100, data transmission errors may be caused due to some external disturbances. In the known technology, the master control terminal 150 is used to add a sum check (checksum) or an error correction mechanism to ensure that the data The transmission is correct. Under this design, once the data transmitted to the SPI flash memory 100 has an error, it must be retransmitted, and it is impossible to check and correct the transmission errors that occur inside the SPI flash memory 100.

Method used

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  • Memory device for serial transmission interface and error correction method thereof
  • Memory device for serial transmission interface and error correction method thereof
  • Memory device for serial transmission interface and error correction method thereof

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Embodiment Construction

[0035] In order to make the implementation description of the present invention clearer, the following serial transmission interface is an example with Serial Peripheral Interface (SPI), and the memory is an example with a flash memory, so the serial transmission interface controller can be called an SPI controller , the memory device of the serial transmission interface can be called SPI flash memory, and those skilled in the art should be able to easily deduce it to other memory devices of the serial transmission interface. In addition, the Error Correction Coding (ECC) controller is called an ECC controller, the error correction code block is called an ECC block, the error correction code encoder is called an ECC encoder, and the error correction code decoder is called an ECC decoder. .

[0036] figure 2 Shown is a block diagram of an SPI flash memory according to a preferred embodiment of the present invention. Please refer to figure 2 , SPI flash memory 200 comprises...

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Abstract

This invention relates to a memory device for serial transmission interface and error correction method thereof. Wherein, adding one error correction mechanism to let the error sensed or automatic corrected ahead of time when serial accessing memory and ensure right data transmission, and reducing the action to correct the master control error and data retransmission.

Description

technical field [0001] The present invention relates to a memory device, and more particularly to a memory device and a method of a serial transmission interface with an error correction mechanism. Background technique [0002] Traditionally, the access interface of a memory device such as a flash memory adopts a parallel transmission interface of an address and data bus, but such an interface needs to use a large number of pins, resulting in high chip packaging cost. In order to reduce the number of chip pins, two serial transmission interfaces are widely used at present, one is the serial peripheral interface (Serial Peripheral Interface, SPI), and the other is proposed by Intel (Intel). low pin count (Low Pin Count, LPC) interface. [0003] figure 1 Shown is a block diagram of a known SPI flash memory, wherein the SPI flash memory refers to a flash memory with a serial peripheral interface (SPI). Please refer to figure 1 , SPI flash memory 100 comprises SPI controller...

Claims

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Application Information

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IPC IPC(8): G11C8/00G11C7/00G11C16/00
Inventor 李育柱黄仕宇周汉良
Owner SUNPLUS TECH CO LTD