Simplified wafer alignment

Abstract

The present invention is directed to aligning wafers within semiconductor fabrication tools. More particularly, one or more aspects of the present invention pertain to quickly and efficiently finding an alignment marking, such as an alignment notch, on a wafer to allow the wafer to be appropriately oriented within an alignment tool. Unlike conventional systems, the notch is located without firmly holding and spinning or rotating the wafer. Exposure to considerable backside contaminants is thereby mitigated and the complexity and / or cost associated with aligning the wafer is thereby reduced.

Description

technical field [0001] The present invention relates generally to semiconductor manufacturing, and more particularly to a technique for simplifying wafer alignment. Background technique [0002] Wafers used in semiconductor manufacturing are typically formed from crystalline materials such as bulk silicon. In particular, each specific type of single crystal silicon (known as corundum) is grown in elongated lengths and thin slices (eg wafers) are cut therefrom. The crystalline structure of the wafer facilitates the formation of semiconductor elements because it helps control the electrical properties of the device and confines uniform electrical properties throughout the semiconductor material. In addition, since impurities that degrade device performance tend to concentrate at irregularities in the material's atomic structure, the regularity of the crystalline structure can provide highly predictable device performance and yield. [0003] When forming semiconductor devices...

AI Technical Summary

Problems solved by technology

[0009] However, the potential for wafer damage and backside contamination, the difficulty of holding and transporting wafers, and the long cycle times associated with aligning wafers, locating notches, and reorienting wafers leaves room for improvement in alignment systems

Images