Separable grid flash memory cell and its forming method
A storage unit and split gate technology, which is applied in the formation of split gate flash memory, can solve the problems that the efficiency needs to be improved.
- Summary
- Abstract
- Description
- Claims
- Application Information
AI Technical Summary
Problems solved by technology
Method used
Image
Examples
Embodiment Construction
[0016] 1 to 7 are schematic cross-sectional process diagrams of a split-gate flash memory cell according to a preferred embodiment of the present invention.
[0017] As shown in FIG. 1, a P-type semiconductor substrate 100 is provided, which includes an N-type source region 80, an N-type drain region 90, and the source region 80 and the drain region. A channel region 95 between regions 90. Next, a first insulating layer 102 , a first conductive layer 103 , a second insulating layer 104 , a second conductive layer 105 , and a top cover layer 106 are sequentially formed on the semiconductor substrate 100 . Wherein, the source region 80 and the drain region 90 can be formed after the gate structure is formed.
[0018] The methods for forming the first insulating layer 102 include chemical vapor deposition (CVD), plasma enhanced chemical vapor deposition (PECVD), thermal oxidation, and the like. The above-mentioned first insulating layer 102 is, for example, silicon oxide, and i...
PUM
Login to View More Abstract
Description
Claims
Application Information
Login to View More 