Gettering using voids formed by surface transformation

a surface transformation and void technology, applied in semiconductor devices, semiconductor/solid-state device details, electrical devices, etc., can solve the problems of small thermal budget of modem low-temperature processes, inability to afford significant diffusion of dopants, and undesirable effects, etc., to achieve the effect of increasing the surface to volume ratio and increasing the gettering of impurities
US20050029683A1Inactive Publication Date: 2005-02-10MICRON TECH INC

Patent Information

Authority / Receiving Office
US · United States
Patent Type
Applications(United States)
Current Assignee / Owner
MICRON TECH INC
Publication Date
2005-02-10
Estimated Expiration
Not applicable · inactive patent

Smart Images

  • Figure 1
    Figure 1
  • Figure 2
    Figure 2
  • Figure 3
    Figure 3
Patent Text Reader

Abstract

One aspect of this disclosure relates to a method for creating a gettering site in a semiconductor wafer. In various embodiments, a predetermined arrangement of a plurality of holes is formed in the semiconductor wafer through a surface of the wafer. The wafer is annealed such that the wafer undergoes a surface transformation to transform the arrangement of the plurality of holes into a predetermined arrangement of at least one empty space of a predetermined size within the wafer to form the gettering site. One aspect relates to a semiconductor wafer. In various embodiments, the wafer includes at least one device region, and at least one gettering region located proximate to the at least one device region. The gettering region includes a precisely-determined arrangement of a plurality of precisely-formed voids that are formed within the wafer using a surface transformation process. Other aspects and embodiments are provided herein.
Need to check novelty before this filing date? Find Prior Art

Description

TECHNICAL FIELD This disclosure relates generally to integrated circuits, and more particularly, to strained semiconductor structures. BACKGROUND Unwanted crystalline defects and impurities can be introduced during crystal growth or subsequent wafer fabrication processes. These defect and impurities can degrade device characteristics and overall yield. Gettering has been described as a process for moving contaminants and / or defects in a semiconductor into its bulk and away from its top surface to create a denuded zone cleared from contaminants and / or defects. Preferably, devices are built in the denuded zone. Historically, extrinsic backside gettering was used to getter silicon wafers. Various extrinsic backside gettering processes involve damaging the backside of the wafer mechanically or by implanting argon, germanium, hydrogen or other implants, or providing a gettering layer on the backside of the wafer using a phophorosilicate glass or oxide backside layer, a polysilicon bac...

Claims

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More