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Methods, systems, and computer program products for modeling inductive effects in a circuit by combining a plurality of localized models

a technology of inductive effects and localized models, applied in the field of electromagnetic modeling of integrated circuits and systems, can solve the problems of computational cost, inability to apply additional approximations and simplifications, and inability to efficiently extract and analyze the localization of magnetic couplings,

Inactive Publication Date: 2005-03-24
BEATTIE MICHAEL W +1
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Benefits of technology

According to some embodiments of the present invention, inductive effects in an integrated circuit device and / or system are modeled by partitioning the integrated circuit device and / or system into multiple windows or portions and determining a first localized inductance matrix for a first portion of the circuit and / or system and a second localized inductance matrix for a second portion of the circuit and / or system. The first and second localized inductance matrices are solved to obtain first and second localized susceptance vectors. The first and second localized susceptance vectors may be combined to form a susceptance matrix, which may be used directly in a susceptance-based simulator, or inverted to obtain a sparser inductance matrix that is representative of the inductive couplings in the entire integrated circuit device and / or system. This inductance matrix may be sparsified by canceling one or more inductive coupling elements. Those inductive coupling elements that are canceled during sparsification may be added to the respective diagonal inductive coupling elements in the inductance matrix that correspond to the respective conductors for which the canceled inductive coupling elements were determined.

Problems solved by technology

Due to the complexity of many integrated circuit devices and systems, such modeling may be computationally expensive.
Full three-dimensional interconnect models often have unmanageable sizes and / or densities associated therewith such that they may not be useful for analysis and simulation purposes without additional approximations and simplifications.
While operating frequencies may make on-chip inductive effects evident, localizing the magnetic couplings for efficient extraction and analysis may be difficult.
It has been demonstrated, however, that simple truncation (i.e., discarding long range couplings) can reduce or destroy the stability of an electromagnetic model.
Shell models have been applied for stable localized extraction, but finding the correct shell sizes for a particular target accuracy may not be straightforward.

Method used

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  • Methods, systems, and computer program products for modeling inductive effects in a circuit by combining a plurality of localized models
  • Methods, systems, and computer program products for modeling inductive effects in a circuit by combining a plurality of localized models
  • Methods, systems, and computer program products for modeling inductive effects in a circuit by combining a plurality of localized models

Examples

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examples

A. Single Layer 2×128 Bit Bus

FIG. 10 illustrates a bus consisting of two blocks of 128 lines (W 1 μm, H 2 pin, Sp 1 μm, L 1000 μm) with a 16 μm gap between the two blocks. The driver resistance RDr is 70 Ω and the load capacitance CLd is 2 fF. Every sixteenth line is a return line (no driver resistance).

In FIGS. 11A-11D the far end node voltage responses for two lines of the bus are shown for 1V step and 10 ps ramp inputs. The far end response reduces in magnitude with increasing distance from the active line. The reference results (white circles) are obtained by including all individual couplings, which results in relatively high runtimes and memory consumption (see Table 1). Double-inverse inductance models are sparsified as described above, dependent on cutoff percentage (the smaller, the more accurate). For simple truncation, all off-diagonals are set to zero, which are zero for the double-inverse model with the given cutoff threshold to ensure fair comparison of the efficie...

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Abstract

Inductive effects in an integrated circuit device and / or system are modeled by partitioning the integrated circuit device and / or system into multiple windows or portions and determining a first localized inductance matrix for a first portion of the circuit and / or system and a second localized inductance matrix for a second portion of the circuit and / or system. The first and second localized inductance matrices are solved to obtain first and second localized susceptance vectors. The first and second localized susceptance vectors may be combined to form a susceptance matrix, which may be used directly in a susceptance-based simulator, or inverted to obtain a sparser inductance matrix that is representative of the inductive couplings in the entire integrated circuit device and / or system.

Description

BACKGROUND OF THE INVENTION The present invention relates generally to the field of electromagnetic modeling of integrated circuits and systems, and, more particularly, to methods, systems, and computer program products for modeling inductive effects in integrated circuits and systems. In modern digital integrated circuits, logic path delays may be dominated by the influence of parasitic capacitive and inductive coupling among the metal interconnect wiring. As technologies may continue to demand increased performance from integrated circuit devices and systems, more detailed interconnect models may be needed to predict signal delay with greater accuracy. Due to the complexity of many integrated circuit devices and systems, such modeling may be computationally expensive. Increasing system size, however, may result in greater emphasis being placed on efficient analyses of parasitic effects and performance. Full three-dimensional interconnect models often have unmanageable sizes and / ...

Claims

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Application Information

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Patent Type & Authority Applications(United States)
IPC IPC(8): G06F17/50
CPCG06F2217/82G06F17/5036G06F2119/10G06F30/367
Inventor BEATTIE, MICHAEL W.PILEGGI, LAWRENCE T.
Owner BEATTIE MICHAEL W
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