Methods and apparatuses for compiler-creating helper threads for multi-threading

Abstract

Methods and apparatuses for compiler-created helper thread for multi-threading are described herein. In one embodiment, exemplary process includes identifying a region of a main thread that likely has one or more delinquent loads, the one or more delinquent loads representing loads which likely suffer cache misses during an execution of the main thread, analyzing the region for one or more helper threads with respect to the main thread, and generating code for the one or more helper threads, the one or more helper threads being speculatively executed in parallel with the main thread to perform one or more tasks for the region of the main thread. Other methods and apparatuses are also described.

Description

FIELD Embodiments of the invention relate to information processing system; and more specifically, to compiler-created helper threads for multi-threading. BACKGROUND Memory latency has become the critical bottleneck to achieving high performance on modern processors. Many large applications today are memory intensive, because their memory access patterns are difficult to predict and their working sets are becoming quite large. Despite continued advances in cache design and new developments in prefetching techniques, the memory bottleneck problem still persists. This problem worsens when executing pointer-intensive applications, which tend to defy conventional stride-based prefetching techniques. One solution is to overlap memory stalls in one program with the execution of useful instructions from another program, thus effectively improving system performance in terms of overall throughput. Improving throughput of multitasking workloads on a single processor has been the primary m...

AI Technical Summary

Problems solved by technology

Memory latency has become the critical bottleneck to achieving high performance on modern processors.

Many large applications today are memory intensive, because their memory access patterns are difficult to predict and their working sets are becoming quite large.

Despite continued advances in cache design and new developments in prefetching techniques, the memory bottleneck problem still persists.

This problem worsens when executing pointer-intensive applications, which tend to defy conventional stride-based prefetching techniques.

However, SMT does not directly improve the performance, in terms of reducing latency, of single-threaded applications.

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