Process for electroplating metals into microscopic recessed features

a technology of electrochemical deposition and metals, applied in the field of electrochemical deposition of metals, can solve the problems of poor electroplating, poor electrical quality of feature sidewalls and bottoms, and increased difficulty in electroplating without seams and/or voids, etc., to achieve the effect of increasing the aspect ratio, slow plating rate, and high relative resistance of surface reaction to diffusion

Inactive Publication Date: 2006-01-19
NOVELLUS SYSTEMS
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, as integrated circuit features become ever smaller, electroplating without the formation of seams and / or voids becomes more challenging.
Deposit of a conducting seed layer onto a substrate and microscopic recessed features often does not provide adequate metallization of the feature walls, leading to poor electroplating.
The poor electrical quality of feature sidewalls and bottom is observed to worsen when the substrate is brought into contact with the electroplating solution.

Method used

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  • Process for electroplating metals into microscopic recessed features
  • Process for electroplating metals into microscopic recessed features
  • Process for electroplating metals into microscopic recessed features

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Embodiment Construction

[0074] In the following description and figures, similar reference numbers are used to identify similar elements.

[0075] The present invention is directed towards the plating of copper onto the surfaces of high AR features as would typically be encountered in the fabrication of integrated circuits. However, it is not the intent of the present inventors that the invention be inherently so limited. Procedures described herein will find application in other areas of the field of electrodeposition. However, to provide concrete and definite expression, we describe in detail herein, the plating of copper.

[0076] Typical electroplating baths will contain the metal to be plated, the associated anions in a typically acid solution. Copper electroplating is typically performed from a solution of CuSO4 dissolved in an aqueous solution of sulfuric acid. In addition to these major constituents of the plating bath, it is common for plating baths to contain several additives. “Additives” is intende...

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Abstract

Several techniques are described for reducing or mitigating the formation of seams and / or voids in electroplating the interior regions of microscopic recessed features. Cathodic polarization is used to mitigate the deleterious effects of introducing a substrate plated with a seed layer into an electroplating solution. Also described are diffusion-controlled electroplating techniques to provide for bottom-up filling of trenches and vias, avoiding thereby sidewalls growing together to create seams / voids. A preliminary plating step is also described that plates a thin film of conductor on the interior surfaces of features leading to adequate electrical conductivity to the feature bottom, facilitating bottom-up filling.

Description

REFERENCE TO RELATED APPLICATIONS [0001] This application claims priority from U.S. Provisional Patent Application 60 / 105,699, filed Oct. 26, 1998, which is incorporated herein by reference.BACKGROUND OF THE INVENTION [0002] 1. Technical Field [0003] This invention relates to electroplating and, in particular, to electrochemical deposition of metals, most particularly to the electrochemical deposition of copper into microscopic recessed features such as high aspect ratio trenches and vias as may occur in the fabrication and packaging of integrated circuits. [0004] 2. Description of Related Art [0005] The art of integrated circuits is moving irresistibly towards increased density of components and faster operating speeds. One problem encountered in decreasing.-the size of components fabricated on an integrated circuit relates to the conductivity of metallic interconnections. Conventional integrated circuits use aluminum as a conductor but for future generations of submicron component...

Claims

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Application Information

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Patent Type & Authority Applications(United States)
IPC IPC(8): C25D5/02C25D3/38C25D5/18H05K3/42
CPCC25D3/02C25D3/38C25D5/022H01L21/76877H05K3/423H01L21/2885C25D5/18C25D5/617
Inventor MAYER, STEVEN T.BHASKARAN, VIJAYPATTON, EVAN E.JACKSON, ROBERT L.REID, JONATHAN
Owner NOVELLUS SYSTEMS
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