Bond finger on via substrate, process of making same, package made thereby, and method of assembling same

a technology of bonding finger and substrate, which is applied in the direction of printed circuit, sustainable manufacturing/processing, final product manufacturing, etc., can solve the problems of reducing the performance of packaged integrated circuits, a hindrance to conventional wire bonding,

Inactive Publication Date: 2008-01-31
INTEL CORP
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

The advent of wireless technologies has led to a push to miniaturize packaged integrated circuits such that conventional wire bonding has become a hindrance with the push to miniaturize.
Additionally, various traces on the surface of the PCB that are routed to locations remote from the wire bond can result in significant cross-talk that diminishes the performance of the packaged integrated circuit.

Method used

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  • Bond finger on via substrate, process of making same, package made thereby, and method of assembling same
  • Bond finger on via substrate, process of making same, package made thereby, and method of assembling same
  • Bond finger on via substrate, process of making same, package made thereby, and method of assembling same

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Embodiment Construction

[0020] The following description includes terms, such as upper, lower, first, second, etc. that are used for descriptive purposes only and are not to be construed as limiting. The embodiments of a device or article described herein can be manufactured, used, or shipped in a number of positions and orientations. The terms “die” and “processor” generally refer to the physical object that is the basic workpiece that is transformed by various process operations into the desired integrated circuit device. A board is typically a resin-impregnated fiberglass structure that acts as a mounting substrate for the die. A die is usually singulated from a wafer, and wafers may be made of semiconducting, non-semiconducting, or combinations of semiconducting and non-semiconducting materials.

[0021] Reference is made to the drawings wherein like structures are provided with like reference designations. In order to show the structure and process embodiments most clearly, the drawings included herein ...

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Abstract

A wire-bonding substrate is disclosed. The wire-bonding substrate includes a first wire-bond pad and a first via that is disposed directly below the first wire-bond pad in the in the wire-bonding substrate. A package is also disclosed that includes a die that is coupled to the first wire-bonding pad. The package can include a larger substrate that is coupled to the wire-bonding substrate through an electrical connection such as a solder ball. A process of forming the wire-bonding substrate is also disclosed. The process includes via formation to stop on the wire-bond pad. A method of assembling a microelectronic package is also disclosed that includes coupling the die to the wire-bond pad. A computing system is also disclosed that includes the wire-bonding substrate.

Description

[0001] This application is a divisional of U.S. patent application Ser. No. 10 / 612,281, filed on Jun. 30, 2003, which is incorporated herein by reference.TECHNICAL FIELD [0002] Disclosed embodiments relate to a wire-bond technology for a substrate. More particularly, disclosed embodiments relate to a bond finger that is aligned with a via in the substrate. BACKGROUND INFORMATION [0003] A wire-bonding package usually requires significant routing of traces within a printed circuit board (PCB). Where the wire bond attaches to the PCB, a bond finger usually leads under a protective film to a location remote from the wire bond, where it can pass into and through the PCB for further electrical communication. The advent of wireless technologies has led to a push to miniaturize packaged integrated circuits such that conventional wire bonding has become a hindrance with the push to miniaturize. Additionally, various traces on the surface of the PCB that are routed to locations remote from th...

Claims

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Application Information

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Patent Type & AuthorityApplications(United States)
IPC IPC(8): H01L23/04H05K1/11H01L23/498
CPCH01L23/49816Y10T29/49156H01L23/49838H01L24/45H01L24/49H01L2224/45144H01L2224/48091H01L2224/48227H01L2224/48235H01L2224/49052H01L2224/49175H01L2224/49433H01L2924/01005H01L2924/01006H01L2924/01013H01L2924/01027H01L2924/01028H01L2924/0103H01L2924/01046H01L2924/01047H01L2924/01077H01L2924/01078H01L2924/01079H01L2924/14H01L2924/1433H01L2924/15311H05K1/111H05K2201/096H05K2203/049H01L23/49827Y10T29/49162Y10T29/49165H01L2924/12041H01L2924/014H01L2924/01045H01L2924/01033H01L24/48H01L2924/00014H01L2924/00H01L2224/05554H01L2924/10162H01L2924/12042Y02P70/50
InventorTAGGART, BRIANAPREITZER, RONALD L.NICKERSON, ROBERT
OwnerINTEL CORP