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Translational Phase Lock Loop and Synthesizer That Eliminates Dividers

a technology of phase lock and synthesizer, applied in the direction of automatic control, electrical equipment, etc., can solve the problems of insufficient assurance, difficult, and heretofore considered extremely expensive if not impossible, and achieve the effect of less cost, faster lock, and more accura

Inactive Publication Date: 2014-07-03
BASAWAPATNA GANESH RAMASWAMY +3
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Benefits of technology

[0017]Our invention is aimed at solving the two biggest issues associated with prior art by doing exactly this. It is non-intuitive, but it is simple and effective.
[0018]Prior art attempts to solve this same issue have involved using multiple frequency multipliers and dividers in order to provide the same effect. They involve the necessity to build two loops to achieve the goal, a first loop that is a traditional loop that sets the VCO at the frequency where it needs to be, and then a second loop that provides a frequency translation Fmixer that can only then be brought into the picture. Our approach needs only one loop, is faster to lock, is more accurate, and costs less.
[0019]This is demonstrated in the detailed description of the invention that follows. Our invention provides almost all the advantages of the DDS and the PLL, while eliminating all their disadvantages. It allows the cleanup of the noisiest aspects of the most typical noisy VCOs.

Problems solved by technology

The fact that a PLL assures that the loop adheres to the phase noise of the RO is in itself not sufficient to assure a compliant phase noise spectrum at the output.
As can be appreciated by anyone familiar with the art, this is not easy.
To provide a signal to the phase detector at the same frequency as the RO, but with the same phase noise characteristics as the VCO over possibly multi-octave or decade bandwidths has been heretofore considered extremely expensive if not impossible.

Method used

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  • Translational Phase Lock Loop and Synthesizer That Eliminates Dividers
  • Translational Phase Lock Loop and Synthesizer That Eliminates Dividers
  • Translational Phase Lock Loop and Synthesizer That Eliminates Dividers

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Embodiment Construction

[0031]The invention concepts are herein attempted to be described using the drawings referred to. They do not represent all possible embodiments, but are used for illustrative purposes only. In order to make clear the improvements the present invention creates and the significant difference in approach, we first describe and discuss the prior art.

[0032]FIG. 1 shows a typical PLL synthesizer block diagram. The Reference Oscillator, RO, 101 is typically chosen for its frequency stability and low phase noise. The Phase Frequency Detector (PFD) 102 is a nonlinear device. It creates the product of the RO signal and the Fvco / N, the low pass filtered (LPF) output of the Programmable Divider 107. When the phase lock loop is locked, the two frequencies Fro and Fvco / N are equal, and the baseband component of this product is proportional to the phase difference between the two input signals to the PFD as a function of time. This Error Signal is passed through a Low Pass Filter, often called a ...

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Abstract

This invention describes a method by which a low cost low phase noise Phase Locked Loop or Phase Locked Loop based Frequency Synthesizer can be realized. The new method, called a Translational Phase Lock Loop or TPLL, allows the conversion of a traditional voltage controlled oscillator or VCO signal so that the phase noise of the VCO signal is substantially identical to the noise that the loop is aimed to correct via comparison to a low noise reference oscillator. It overcomes additional problems associated with traditional and prior art phase lock loops in terms of unwanted spurious signals, complexity, and cost.

Description

CROSS RELATION TO RELATED APPLICATIONS[0001]Not ApplicableFIELD OF THE INVENTION[0002]This invention pertains to a method to create high purity broadband signals from a low noise tunable source using novel signal processing and synthesis techniques.DEFINITION OF TERMS[0003]Voltage Controlled Oscillator (VCO): An oscillator whose frequency is controlled by the application of a voltage (or current) to a tuning port.[0004]Phase Lock Loop (PLL): A closed loop system where the output of a VCO is locked to a Reference Oscillator within a certain bandwidth.[0005]TCXO: Temperature Controlled Crystal Oscillator. The Crystal Oscillator output is kept stable by a temperature sensor that is used to electronically control the frequency.[0006]OCXO: Oven Controlled Crystal Oscillator. A heater element is used to control the temperature of the oscillator circuit. Usually provides better stability than a TCXO, but is more expensive.[0007]DDS: A Direct Digital Synthesizer. Is used to create arbitrary...

Claims

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Application Information

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Patent Type & Authority Applications(United States)
IPC IPC(8): H03L7/093
CPCH03L7/093H03L7/104H03L7/16H03L2207/12
Inventor BASAWAPATNA, GANESH RAMASWAMYBASAWAPATNA, VARALAKSHMIBASAWAPATNA, ANAND GANESHBASAWAPATNA, ASHOK RAM
Owner BASAWAPATNA GANESH RAMASWAMY