Physical unclonable function generation and management

Abstract

Methods, systems and devices related to authentication of chips using physical physical unclonable functions (PUFs) are disclosed. In accordance one such method, a test voltage is applied to a PUF system including a first subset of PUF elements that are arranged in series and a second subset of PUF elements that are arranged in series, where the first subset of PUF elements is arranged in parallel with respect to the second subset of PUF elements. In addition, the PUF system is measured to obtain at least one differential of states between the first subset of PUF elements and the second subset of PUF elements. Further, the method includes outputting an authentication sequence for the circuit that is based on the one or more differentials of states.

Description

RELATED APPLICATION DATA[0001]This application is a Continuation application of co-pending U.S. patent application Ser. No. 13 / 886,805 filed on May 3, 2013, incorporated herein by reference in its entirety.BACKGROUND[0002]1. Technical Field[0003]The present invention relates to physical unclonable functions, and more particularly, to on-chip physical unclonable function generation and management thereof.[0004]2. Description of the Related Art[0005]Process variations of integrated circuits present a fundamental reliability challenge with regard to generation and measurement of physical unclonable functions. In particular, there is an inherent contradiction between forming a physical unclonable function (PUF) which depends on large variability and fabricating a reliable PUF measurement system which depends on low variability while integrating both functions monolithically on the same chip. For example, although process variability maximizes the effectiveness of a PUF, process variabil...

AI Technical Summary

Benefits of technology

The patent describes a circuit authentication system that uses multiple PUF elements and a measurement unit to create an authentication signature for a circuit. The PUF elements are arranged in series, and the measurement unit measures the differentials of states between them. The system can also identify unreliable PUF states. The technical effects of this system are an improved security measure for authenticating circuits and the ability to identify unreliable PUF states.

Problems solved by technology

Process variations of integrated circuits present a fundamental reliability challenge with regard to generation and measurement of physical unclonable functions.

In particular, there is an inherent contradiction between forming a physical unclonable function (PUF) which depends on large variability and fabricating a reliable PUF measurement system which depends on low variability while integrating both functions monolithically on the same chip.

For example, although process variability maximizes the effectiveness of a PUF, process variability degrades the performance of the measurement circuit.

However, this is difficult to achieve when the PUF scheme is implemented on-chip due to the conflicting goals of maximizing process variability for PUF generation and minimizing process variability to manufacture a reliable integrated circuit.

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