Manufacturing method of power semiconductor

Abstract

A manufacturing method of a power semiconductor includes steps of providing a first semiconductor substrate and a second semiconductor substrate, forming a metal oxide semiconductor layer on a first surface of the first semiconductor substrate, grinding a second surface of the first semiconductor substrate, forming a N-type buffer layer and a P-type injection layer on a third surface of the second semiconductor substrate through ion implanting, grinding a fourth surface of the second semiconductor substrate, and combining the second surface of the first semiconductor substrate with the third surface of the second semiconductor substrate for forming a third semiconductor substrate. As a result, the present invention achieves the advantages of enhancing the process flexibility and un-limiting the characteristics of the power semiconductor.

Description

FIELD OF THE INVENTION[0001]The present invention relates to a manufacturing method of a semiconductor, and more particularly to a manufacturing method of a power semiconductor using multiple wafer bonding technology.BACKGROUND OF THE INVENTION[0002]In recent years, with the growing of the technologies, lot types of electronic products are produced. The high-tech electronic devices are deeply combined with human's daily life. For example, each of the panels and the global positioning systems of automobiles, smart phones, tablet PCs, variety toys and remote-controlled apparatuses is part of the technology life of human nowadays. The mainly necessary elements in electronic devices are semiconductor elements, such like power semiconductors, transistors, amplifiers and switches, especially the power semiconductors are much more fabricated in industry.[0003]For example, one of the common power semiconductors is an insulated gate bipolar transistor (hereinafter “IGBT”). The basic encapsul...

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Benefits of technology

[0007]The present invention provides a manufacturing method of a power semiconductor in order to eliminate the drawbacks of the phenomenon caused by thinning the wafer thickness, the limitation of the melting point of the surface metal, the low process flexibility, and the limitation of the characteristics of power semiconductors.

[0008]The present invention also provides a manufacturing method of a power semiconductor. By respectively fabricating a first semiconductor substrate and a second semiconductor substrate and forming a third semiconductor substrate by combining the first semiconductor substrate and the second semiconductor substrate, a N-type buffer layer and a P-type injection layer are formed through ion implanting and high-temperature drive-in diffusion, which are not limited by the melting point of the metal. As a result, the process flexibility is enhanced, and the characteristics of the power semiconductor are un-limited.

[0009]The present invention further provides a manufacturing method of a power semiconductor. Since a first semiconductor substrate is carried on and combined with a fourth semiconductor substrate, the phenomenon of easily bending and frangibility caused by thinning the wafer thickness is avoided, and the backside implant process and the backside anneal process are smoothly proceeded.

Problems solved by technology

As a result, the process flexibility is enhanced, and the characteristics of the power semiconductor are un-limited.

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