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Memory system, memory module and method to backup and restore system using command address latency

a memory system and memory module technology, applied in the field of memory system and memory module, can solve the problems of increasing manufacturing costs and increasing system design difficulties, and achieve the effect of reducing the number of lines

Active Publication Date: 2016-10-20
SK HYNIX INC
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Benefits of technology

The patent text describes a memory system that allows a controller to access multiple memory devices without using a lot of lines. The technical effect of this is that it improves the efficiency and speed of the memory system.

Problems solved by technology

This lead to increase difficulties in system design as well as increased manufacturing costs.

Method used

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  • Memory system, memory module and method to backup and restore system using command address latency
  • Memory system, memory module and method to backup and restore system using command address latency
  • Memory system, memory module and method to backup and restore system using command address latency

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Embodiment Construction

[0029]Various embodiments will be described below in more detail with reference to the accompanying drawings. The present invention may, however, be embodied in different forms and should not be construed as limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the scope of the present invention to those skilled in the art. Throughout the disclosure, like reference numerals refer to like parts throughout the various figures and embodiments of the present invention.

[0030]Before embodiments of the present invention are described, a Per DRAM Addressability (PDA) mode and Command Address Latency (CAL) of a memory device will be described as follows.

[0031]FIG. 2 is a timing diagram illustrating an operation according to a mode register set (MRS) during the PDA mode in a memory device.

[0032]During the PDA mode, memory devices may be enabled to perform independent MRS operations. When...

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Abstract

A memory system having a plurality of memory devices includes a controller for separately accessing the memory devices. The memory system includes a data bus for transferring data, a control bus for transferring a command and address CAL, and first and second memory devices coupled to the data bus and the control bus. The controller controls the first and second memory devices through the data bus and the control bus, wherein the first and second memory devices have different values of the CAL, and wherein a difference of the CAL values is greater than or equal to a RAS to CAS delay time tRCD.

Description

CROSS-REFERENCE TO RELATED APPLICATIONS[0001]The present application claims priority of Korean Patent Application No. 10-2015-0052427, filed on Apr. 14, 2015, which is incorporated herein by reference in its entirety.BACKGROUND[0002]1. Field[0003]This patent document relates to a memory system and a memory module.[0004]2. Description of the Related Art[0005]In most cases, a single controller is used to control multiple memory devices.[0006]As illustrated in FIG. 1A, when a control bus CMD / ADDR_BUS0 and a data bus DATA_BUS 0 between a controller 100 and a memory device 110_0 are separated from a control bus CMD / ADD_BUS1 and a data bus DATA_BUS1 between the controller 100 and a memory device 110_1, the controller 100 can separately control the memory devices 110_0 and 110_1. A command and address are transmitted through the control bus. For example, while the memory device 110_0 performs a read operation, the memory device 110_1 may perform a write operation.[0007]As illustrated in FI...

Claims

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Application Information

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Patent Type & Authority Applications(United States)
IPC IPC(8): G06F13/16G11C15/04G11C8/18G06F13/40
CPCG06F13/161G06F13/1657G11C8/18G06F13/404G11C15/046G06F13/1694G06F13/1668
Inventor YOON, HYUN-JU
Owner SK HYNIX INC