Semiconductor devices and methods of manufacturing the same
a technology of semiconductors and semiconductors, applied in the direction of instruments, transistors, error detection/correction, etc., can solve the problem of increasing signal nois
Active Publication Date: 2017-09-14
SAMSUNG ELECTRONICS CO LTD
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- Description
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Problems solved by technology
Increasing the clock frequency to increase the operation speed may also result in increased signal noise between the power signals such as power voltage Vdd and ground voltage Vss during a read operation and a write operation.
Method used
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[0027]Various exemplary embodiments will be described more fully hereinafter with reference to the accompanying drawings, in which some exemplary embodiments are shown. The present inventive concept may, however, be embodied in many different forms and should not be construed as limited to the exemplary embodiments set forth herein. Rather, these exemplary embodiments are provided so that this description will be thorough and complete, and will fully convey the scope of the present inventive concept to those skilled in the art. In the drawings, the sizes and relative sizes of layers and regions may be exaggerated for clarity.
[0028]It will be understood that when an element or layer is referred to as being “on,”“connected to” or “coupled to” another element or layer, it can be directly on, connected or coupled to the other element or layer or intervening elements or layers may be present. In contrast, when an element is referred to as being “directly on,”“directly connected to” or “d...
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A semiconductor device includes a substrate, a memory structure and a capacitor structure including at least one array of capacitors. The memory structure is disposed in a first region of the device. The capacitor structure is disposed in a second region of the device. The capacitor structure may include a first capacitor array, a second capacitor array, a third capacitor array and a first landing pad. The first landing pad is disposed between the substrate and lower electrodes of capacitors of the first and second capacitor arrays, and contacts the lower electrodes so as to electrically connect the first capacitor array and the second capacitor array. Upper electrodes of capacitors of the second and third capacitor arrays are integral such that the second capacitor array and the third capacitor array are electrically connected to each other.
Description
PRIORITY STATEMENT[0001]This application claims priority under 35 U.S.C §119 to Korean Patent Application No. 10-2014-0126981 filed on Sep. 23, 2014 in the Korean Intellectual Property Office, the disclosure of which is hereby incorporated by reference in its entirety.BACKGROUND[0002]1. Field[0003]Exemplary embodiments relate to semiconductor devices and methods of manufacturing the same. More particularly, exemplary embodiments relate to semiconductor devices including decoupling capacitors and methods of manufacturing the same.[0004]2. Description of the Related Art[0005]Recently, as semiconductor memory devices become more highly integrated, their operation speed has also increased. Increasing the clock frequency to increase the operation speed may also result in increased signal noise between the power signals such as power voltage Vdd and ground voltage Vss during a read operation and a write operation. A capacitance is used as a noise filter to obviate this problem.SUMMARY[000...
Claims
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IPC IPC(8): H01L27/108H01L23/528H01L49/02
CPCH01L27/10814H01L23/528H01L28/40H01L27/10823G06F11/1048H01L2924/0002G11C11/5635G11C11/5671G11C16/0466G11C29/52G11C29/42G11C2029/0411H10B43/27H01L2924/00H10B12/34H10B12/315
Inventor YOO, HAN-SIKKWON, HYUK-JOONOH, JUNG-HAKIM, JUN-HO
Owner SAMSUNG ELECTRONICS CO LTD