Method of making a lead-on-chip device

Abstract

A semiconductor device which is sealed with a plastic sealing layer and whose thickness is regulated to be below a given value is known. Since the thickness of the device is small, and the thickness of the upper portion of the plastic sealing layer and the thickness of the lower portion thereof are different from each other, the plastic sealing layer becomes warped, thus causing a crack on the side of the semiconductor chip.To solve this problem, the semiconductor device according to the present invention comprises a semiconductor chip on which a plurality of grooves are defined. Consequently, the thickness of the lower portion of the plastic layer becomes greater, thereby preventing cracks from occurring on the semiconductor chip.

Description

[0001]This application is a divisional of U.S. application Ser. No. 09 / 328,905, filed Jun. 9, 1999 now U.S. Pat. No. 6,534,845.[0002]This patent application claims priority based on a Japanese patent application, H10-295817 filed on Oct. 16, 1998, the contents of which are incorporated herein by reference.BACKGROUND OF THE INVENTION[0003]1. Field of the Invention[0004]The present invention relates to a plastic molding seal semiconductor device, and in particular to an LOC (Lead on Chip) type semiconductor.[0005]2. Description of the Related Art[0006]Plastic molding seal semiconductor devices for electronic equipment have been widely used. These semiconductor devices are sealed with plastic to protect the semiconductor chips laid in the semiconductor devices. Recently, these semiconductor devices, especially LSIs (Large Scaled Integrated circuits) have increased in size with the enhancement of integration. For example, the storage capacity of memory devices is increasing, so that the...

AI Technical Summary

Benefits of technology

[0015]According to an aspect of the present invention, there is provided a semiconductor device comprising: a semiconductor chip including a top side and a bottom side; a package including an upper portion provided on the top side of the semiconductor chip and a lower portion provided on the bottom side thereof, the upper portion being thicker than the lower portion; and a resisting member provided on the bottom side of the semiconductor chip, for preventing the semiconductor chip from being bent.

[0019]According to still another aspect of the present invention, there is provided a semiconductor device having a plurality of leads formed on a semiconductor chip comprising: a semiconductor chip including a top side and a bottom side; a package including an upper portion provided on the top side of the semiconductor chip and a lower portion provided on the bottom side thereof, the upper portion being thicker than the lower portion; and a resisting member provided on the bottom side of the semiconductor chip, for preventing the semiconductor chip from being bent.

[0020]According to still another aspect of the present invention, there is provided a semiconductor device, the thickness of which is below a given value regulated by a specification of Thin Small Outline Package, comprising: a semiconductor chip including a top side and a bottom side; a package including an upper portion provided on the top side of the semiconductor chip and a lower portion provided on the bottom side thereof, the upper portion being thicker than the lower portion; and a resisting member provided on the bottom side of the semiconductor chip, for preventing the semiconductor chip from being bent.

[0021]According to still another aspect of the present invention, there is provided a method of manufacturing a semiconductor device including a semiconductor chip and a package sealing the semiconductor chip, the semiconductor chip having a top side and a bottom side, and a plurality of leads being arranged on the top side of the semiconductor chip, the method comprising: forming a resisting member on the bottom side of the semiconductor chip, for preventing the semiconductor chip from being bent.

[0022]According to still another aspect of the present invention, there is provided a semiconductor device, having a thickness below a given value regulated by a specification of Thin Small Outline Packages, comprising: a semiconductor chip including a top side and a bottom side; a package including an upper portion provided on said top side of the semiconductor chip and a lower portion provided on said bottom side thereof, said upper portion being thicker than said lower portion; and a resisting member provided on said bottom side of said semiconductor chip, for preventing said semiconductor chip from being bent.

Problems solved by technology

On the other hand, appliances tend to be increasingly smaller in size, which requires the semiconductor devices to be smaller.

However, a total exfoliation might yield a crack in the semiconductor chip 91 or in the plastic sealing layer 97.

If water is absorbed in the semiconductor device, the water will vaporize to yield a crack therein.

As discussed above, the conventional LOC semiconductor device has such drawbacks that they may cause a crack in the semiconductor ship or in the plastic sealing layer.

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