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Programmable address processor for graphics applications

a graphics application and address processor technology, applied in the field of computer systems, can solve the problems of restricting performance, severely restricting the performance of the gpu, and the cost associated with memory lookups remains relatively high when compared to the cost of processing tim

Active Publication Date: 2011-10-11
ADVANCED MICRO DEVICES INC
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Benefits of technology

This approach significantly reduces memory latency by minimizing the number of required memory lookups, thereby enhancing processing system performance.

Problems solved by technology

In many processing systems, memory lookups, i.e., operations that retrieve information from memory or update information stored in memory, are often costly in terms of processing time, and thus are an important bottleneck that often restricts performance.
In such a case, memory lookups often severely limit the performance of the GPU.
However, the cost associated with memory lookups still remains relatively high when compared to the cost related to the processing time of an instruction.

Method used

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  • Programmable address processor for graphics applications
  • Programmable address processor for graphics applications
  • Programmable address processor for graphics applications

Examples

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example method embodiments

[0090]FIG. 7 shows flowchart 700 providing example steps for processing memory lookup requests, according to an embodiment of the present invention. Other structural and operational embodiments will be apparent to persons skilled in the relevant art(s) based on the following discussion. Flowchart 700 is described with reference to the embodiment of FIG. 3. However, flowchart 700 is not limited to that embodiment. The steps shown in FIG. 7 do not necessarily have to occur in the order shown. The steps of FIG. 7 are described in detail below.

[0091]Flowchart 700 begins with step 702. In step 702, a primary memory lookup request is received. For example, in FIG. 3, input module 302 receives a memory lookup request from L1 cache 106.

[0092]In step 704, the primary memory lookup request is classified. For example, in FIG. 3, input module 302 can classify a received primary memory lookup request as a first memory lookup type. For example, the first memory lookup type can be a linked list tr...

example graphics processing embodiments

[0118]Aspects of the present invention may be applied in graphical processing units to increase the efficiency of memory lookups. For example, the methods and systems described herein may be applied to data structure traversals that may involved when dealing with vector textures (e.g., font rendering), texture trees (e.g., wavelet decompression), isosurface extraction, grid computations involved in graph processing (e.g., fast fluid dynamics), sparse matrices as applied in physics and elsewhere, and other tasks as would be appreciated by those skilled in relevant art(s).

[0119]In the above mentioned examples, linked list, trees, and combinations thereof are traversed in a series of dependent memory lookups with a series of computations that involve relatively simple computations (e.g., comparisons), and thus may be ideal for an APU with limited computational resources. The results of the traversals are often reused by elements of a GPU.

[0120]For example, FIG. 9A is an illustration of...

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PUM

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Abstract

Methods and systems for processing memory lookup requests are provided. In an embodiment, an address processing unit includes an instructions module configured to store instructions to be executed to complete a primary memory lookup request and a logic unit coupled to the instructions module. The primary memory lookup request is associated with a desired address. Based on an instruction stored in the instructions module, the logic unit is configured to generate a secondary memory lookup request that requests the desired address.In another embodiment, a method of processing memory lookups requests includes receiving a primary memory lookup request that corresponds to a desired memory address and generating a plurality of secondary memory lookup requests.

Description

BACKGROUND OF THE INVENTION[0001]1. Field of the Invention[0002]The present invention generally relates to computer systems. More particularly, the present invention relates to computer systems that use memory lookups.[0003]2. Related Art[0004]In many processing systems, memory lookups, i.e., operations that retrieve information from memory or update information stored in memory, are often costly in terms of processing time, and thus are an important bottleneck that often restricts performance. For example, graphics processor units (GPUs) often process instructions that result in a series of associated memory lookups being executed. In such a case, memory lookups often severely limit the performance of the GPU.[0005]Systems have been developed to decrease the cost associated with memory lookups. For example, caches have been developed that allow for relatively quick access to information that is needed frequently. Advanced caches and algorithms that populate caches in an efficient m...

Claims

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Application Information

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Patent Type & Authority Patents(United States)
IPC IPC(8): G06F12/00
CPCG06F9/345G06F9/383G06F9/3851G06F12/0897
Inventor SKOWRONEK, STANISLAW K.
Owner ADVANCED MICRO DEVICES INC