System and method for polyphase ground-fault circuit-interrupters

Abstract

A ground-fault circuit-interrupter (GFCI) system is provided that provides reliable and timely tripping of faulted circuits while minimizing so-called “nuisance” tripping. The GFCI includes a voltage unbalance detection device coupled to the main bus circuit for detecting a voltage unbalance during a fault condition. A computer processor in communication with the voltage unbalance detection device is programmed to determine when an actual fault condition exists based on a state of the voltage unbalance and certain predetermined among the fault signal generated by a GFCI unit in the main bus circuit and the fault signals generated by GFCI units in individual feeder circuits.

Description

FIELD OF THE INVENTION[0001]The present invention relates generally to polyphase ground-fault circuit-interrupter (GFCI) systems, and more particularly to a system and method of using voltage imbalances for tripping intelligence.BACKGROUND OF THE INVENTION[0002]GFCI systems have been improved to provide prompt detection and isolation of system faults while minimizing nuisance interruptions. See for example U.S. Pat. No. 7,301,739, which is assigned to the present assignee and which is herein incorporated by reference in its entirety. U.S. Pat. No. 7,301,739 also describes a means to compensate for small capacitive currents that normally flow throughout a three-phase power system during low- or high-level ground-faults, thereby further minimizing tripping of the non-faulted circuits. However, GFCI systems in most common use at this time have been designed with the primary objective of permitting reliable, high-speed ground-fault interruption for single-phase power systems operating a...

AI Technical Summary

Benefits of technology

"The present invention provides a ground-fault circuit-interruption system for use with a polyphase power supply and a main bus circuit having multiple feeder or branch circuits. The system includes a voltage unbalance detection device and multiple GFCI units associated with each feeder or branch circuit for detecting fault conditions and generating fault signals. A computer or computational processor continuously monitors the voltage unbalance and fault signals and determines when an actual fault condition exists based on the state of the voltage unbalance and certain predetermined relationships among the fault signals. The processor then generates a trip signal to the GFCI unit or units corresponding to the feeder or branch circuit experiencing the actual fault condition, causing the circuit to be interrupted. The system can more reliably disconnect power from a faulted circuit without causing interruption of other healthy circuits and minimizes false trips of non-faulted circuits."

Problems solved by technology

GFSs designed to trip at such low currents typically include current transformers that may be susceptible to magnetic saturation due to high-level ground current conditions on involved branch or feeder circuits.

Magnetic saturation of the transformers may cause the corresponding GCFIs to falsely trip non-faulted circuits.

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