Method of controlling direct memory access of a peripheral memory of a peripheral by a master, an associated circuitry, an associated device and an associated computer program product
a peripheral memory and master technology, applied in the direction of instruments, electric digital data processing, etc., can solve the problems of insufficient satisfactory known schemes and compromise of current designs, and achieve the effect of reducing the number of compromised designs
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[0013]FIG. 1 schematically shows a device, in this example a microcontroller UC1, comprising a circuitry having one or more masters CPU0, NONCPU0, DMA0, one or more peripherals PER0, PER1, PER2, an access control circuitry CIRC1 and a system memory MEM0. The access control circuitry CIRC1 comprises a system interconnect circuitry SYSICON, a memory protection unit (MPU) MPU0 and a bus interface AIPS. The access control circuitry CIRC1 is arranged to provide an interface between the one or more masters CPU0, NONCPU0, DMA0 and the one or more peripherals PER0, PER1, PER2. The peripherals may be memory-mapped peripherals, i.e., with the peripherals being controlled with parameters settings in memory, such as in a random-access memory or in one or more registers. The memory may be physically implemented as, for example, a private memory, or have an allocated space in a common memory. The peripheral PER0 may e.g. be a Controller Area Network (CAN)-bus interface CAN_IF arranged to interfac...
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