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Method of controlling direct memory access of a peripheral memory of a peripheral by a master, an associated circuitry, an associated device and an associated computer program product

a peripheral memory and master technology, applied in the direction of instruments, electric digital data processing, etc., can solve the problems of insufficient satisfactory known schemes and compromise of current designs, and achieve the effect of reducing the number of compromised designs

Active Publication Date: 2017-12-19
NXP USA INC
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Benefits of technology

The present invention provides a way to control when a computer chip accesses its own memory. This can be useful, for example, to prevent unauthorized access to sensitive information. The invention involves using a circuit and a device to allow for this control. The technical effect of the invention is to enhance the security of computer systems and protect sensitive information from being accessed without permission.

Problems solved by technology

However, known schemes may not always be sufficiently satisfactory.
Safety concerns remain, such as erroneous operation of internal circuitry which may affect I / O in an unexpected and undesired manner.
Current designs may still be compromised due to, for example, an access by a non-CPU master to areas of the device that may directly affect I / O, or an access that is not intended to occur but that results from a random soft error.

Method used

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  • Method of controlling direct memory access of a peripheral memory of a peripheral by a master, an associated circuitry, an associated device and an associated computer program product
  • Method of controlling direct memory access of a peripheral memory of a peripheral by a master, an associated circuitry, an associated device and an associated computer program product
  • Method of controlling direct memory access of a peripheral memory of a peripheral by a master, an associated circuitry, an associated device and an associated computer program product

Examples

Experimental program
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Embodiment Construction

[0013]FIG. 1 schematically shows a device, in this example a microcontroller UC1, comprising a circuitry having one or more masters CPU0, NONCPU0, DMA0, one or more peripherals PER0, PER1, PER2, an access control circuitry CIRC1 and a system memory MEM0. The access control circuitry CIRC1 comprises a system interconnect circuitry SYSICON, a memory protection unit (MPU) MPU0 and a bus interface AIPS. The access control circuitry CIRC1 is arranged to provide an interface between the one or more masters CPU0, NONCPU0, DMA0 and the one or more peripherals PER0, PER1, PER2. The peripherals may be memory-mapped peripherals, i.e., with the peripherals being controlled with parameters settings in memory, such as in a random-access memory or in one or more registers. The memory may be physically implemented as, for example, a private memory, or have an allocated space in a common memory. The peripheral PER0 may e.g. be a Controller Area Network (CAN)-bus interface CAN_IF arranged to interfac...

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Abstract

A method of controlling direct memory access of a peripheral memory of a peripheral by a master is described. The method includes checking whether there is a pending request from the peripheral for a direct memory access service, establishing whether an access condition is satisfied in dependence on at least whether there is a pending request, and, if the access condition is satisfied, granting access to the master. Also, an associated device and an associated computer program product are described.

Description

FIELD OF THE INVENTION[0001]This invention relates to a method of controlling direct memory access of a peripheral memory of a peripheral by a master, an associated circuitry, an associated device and an associated computer program product.BACKGROUND OF THE INVENTION[0002]There is a continued demand for enhanced levels of safety related features within devices, such as microcontrollers, having one or more masters and one or more peripherals. Currently microcontrollers implement several layers of protection between the masters and the peripherals, particularly those affecting device Input / Output (I / O) directly. Current designs have protection through, for example, the use of user / supervisor level access rights, address range based protection through a Memory Protection Unit (MPU) and a Memory Management Unit (MMU), Master ID protection, and Process ID based protection. For example, U.S. Pat. No. 7,689,733 B2 describes a computer that operates in a metered mode for normal use and a re...

Claims

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Application Information

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Patent Type & Authority Patents(United States)
IPC IPC(8): G06F13/28G06F13/364G06F13/42
CPCG06F13/28G06F13/4282G06F13/364
Inventor ROBERSTON, ALISTAIRCULSHAW, CARLDEVINE, ALAN
Owner NXP USA INC
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