System and method for power-efficient charging and discharging of a capacitive load from a single source
Inactive Publication Date: 2005-12-13
UNIV OF SOUTHERN CALIFORNIA
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AI Technical Summary
Benefits of technology
[0013]The need in the art is addressed by the present invention which, in a most general sense, provides a system and method for efficiently charging and discharging a capacitive load from a single voltage source. The inventive system includes a first switch for selectively connecting the voltage source to the load and a second switch for selectively providing a short across the load as may be common in the art. A particularly novel aspect of the invention resides in the provision of plural capacitive elements and a switching mechanism for selectively connecting each of the capacitive elements to the load whereby the load is gradually charged or discharged.
Problems solved by technology
That is, low efficiency leads to higher costs due to the waste of energy and the need for larger power supplies.
For battery powered systems, power dissipation limits battery life.
This necessitates larger batteries which increases the cost and weight of the system while limiting the applicability thereof.
As an example, consider coronary pacemakers where power dissipation is a critical concern due to the difficultly of accessing the battery for replacement and the cost and inconvenience associated with the use of larger batteries.
Accordingly, systems which exhibit considerable power dissipation often require measures such as heat sinks to protect or cool system components from the heat created by the circuit.
The use of heat sinks and the like adds to the cost, size and weight of the system and thereby limits the utility of same.
However, in addition to costly interfacing issues, attempts to lower the voltage of digital processors and the like have been limited by the fact that the trend is to higher processing speeds which cannot be attained at arbitrarily low operating voltages.
Method used
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[0020]Illustrative embodiments and exemplary applications will now be described with reference to the accompanying drawings to disclose the advantageous teachings of the present invention,
[0021]While the present invention is described herein with reference to illustrative embodiments for particular applications, it should be understood that the invention is not limited thereto. Those having ordinary skill in the art and access to the teachings provided herein will recognize additional modifications, applications, and embodiments within the scope thereof.
[0022]Most of the power dissipation in digital CMOS circuits is due to repeated chug” and discharging of capacitive loads including those internal to the circuit end those associated with the output signals.
[0023]FIG. 1 is a simplified representation of a conventional driver for a capacitive load. The load CL represents the capacitance of a load and the interlead capacitance of the lines connecting the driver 10′ to the load 12′. The...
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A system and method for efficiently charging and discharging a capacitive load from a single voltage source. The system includes a brat switch for selectively connecting the voltage source to the load and a second switch for selectively providing a short across the load as may he common in the art. A particularly novel aspect of the invention resides in the provision of plural capacitive elements and a switching mechanism for selectively connecting each of the capacitive elements to the load whereby the load is gradually charged or discharged. In the illustrative embodiment, the switching mechanism includes a set of switches for selectively connecting each of the capacitive elements to the capacitive load and a switch control mechanism for selectively activating the switches.
Description
CROSS-REFERENCE TO RELATED APPLICATION[0001]This application and Reissue application Ser. No. 08 / 986,327, filed Dec. 5, 1997 (now U.S. Patent No. RE37,552, issued Feb. 19, 2002) are both reissue applications for U.S. Pat. No. 5,473,526, issued Dec. 5,1991. This application is a continuation of U.S. Pat. No. RE37,552.<?insert-end id="INS-S-00002" ?>[0002]This invention was made with government support under DABT-63-92-C-0052 awarded by ARPA. The government has certain rights in the invention.BACKGROUND OF THE INVENTION[0003]1. Field of the Invention[0004]The present invention relates to electronic circuits and systems. More specifically, the present invention relates to power dissipation in electrode circuits and systems.[0005]2. Description of the Related Art[0006]Power dissipation of electronic circuitry is an important design consideration for many applications. Power dissipation provides a measure of the efficiency of the system. The efficiency of the system impacts the des...
Claims
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Login to View More IPC IPC(8): H02M3/07
CPCH02M3/07
InventorSVENSSON, LARS G.ATHAS, WILLIAM C.KOLLER, JEFFREY G.
OwnerUNIV OF SOUTHERN CALIFORNIA