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6results about How to "Reduce the horizontal area" patented technology

Power amplifier

The utility model discloses a power amplifier, which is characterized in that a first-stage amplification circuit is arranged in a first sunken groove, an input external matching circuit of a second-stage amplification circuit is arranged on an input cover plate, and an input internal matching circuit of the second-stage amplification circuit and the second-stage amplification circuit are arranged on an embedded heat sink; an output matching circuit of the secondary amplification circuit is arranged in a second sunken groove, and an embedded heat sink is arranged between the first sunken groove and the second sunken groove, so that circuits in the first sunken groove and the second sunken groove are far away from each other, the degree of mutual interference is small, an additional isolation circuit does not need to be arranged, and in addition, the embedded heat sink is arranged between the first sunken groove and the second sunken groove. According to the power amplifier, a part of the circuit is arranged on the input cover plate, the input cover plate is arranged on the first sunken groove, and the output cover plate is arranged on the second sunken groove, so that the circuits are not completely laid on the same horizontal plane but are also distributed in the vertical direction, the horizontal area of the whole power amplifier is saved, and the power amplifier is convenient to install and use.
Owner:SHENZHEN SHIDAI SUXIN TECH CO LTD +1

Preparation method, quantum random number security chip and quantum key generation method

The invention provides a preparation method, a quantum random number security chip and a quantum key generation method, and mainly relates to the technical field of quantum random number generation. The preparation method comprises the steps that a three-dimensional stacking structure is adopted, a quantum entropy source chip bare chip and a safety processing module are arranged on the first surface of a substrate and the second surface of the substrate respectively, and a plurality of copper columns are arranged on the second surface of the substrate; performing plastic packaging on the first surface of the substrate and the second surface of the substrate by adopting a plastic packaging process to obtain a plastic packaging structure wrapping the substrate; and redirecting a substrate bonding pad configured on the second surface of the substrate to a fan-out area of the substrate by using a wafer fan-out mode, and taking the salient points of the plurality of copper columns exposed outside the plastic package structure as external pins of the quantum random number security chip to obtain the quantum random number security chip.
Owner:HEFEI NATIONAL LABORATORY +1

Memory and manufacturing method thereof

ActiveCN119451101Areduce the horizontal arealower vertical heightSemiconductorSemiconductor technology
The invention belongs to the technical field of semiconductors, and particularly relates to a memory and a manufacturing method thereof, the memory comprises a substrate and at least one memory layer, the memory layer is formed on the substrate, the memory layer comprises a memory unit, and the memory unit comprises a read transistor, comprising a first grid electrode, a first semiconductor layer at least horizontally surrounding the peripheral side of the first grid electrode and a first grid insulating layer formed between the first grid electrode and the first semiconductor layer, the first grid electrode comprises a grid bottom wall and a grid side wall, the grid side wall horizontally surrounds the grid bottom wall and extends in the direction away from the substrate, and a grid groove is defined by the grid side wall and the grid bottom wall; the writing transistor comprises a second grid electrode, a second semiconductor layer at least horizontally surrounding the peripheral side of the second grid electrode and a second grid insulating layer formed between the second grid electrode and the second semiconductor layer, and part of the second semiconductor layer is embedded in the grid electrode groove and is in contact with at least part of the grid electrode groove. The memory of the scheme can reduce the technical difficulty of the process while improving the storage density.
Owner:SWAYSURE TECHNOLOGY CO LTD

Material handling system and vertical processing equipment

This invention provides a loading and unloading system and a vertical processing equipment. The loading and unloading system includes a frame, and a boat feeding device, a boat storage device, a boat clamping device, a loading and unloading robot, and a boat moving device, all mounted on the frame. The boat feeding device is configured to transport vertical boats from outside the frame to inside the frame. The boat storage device has multiple buffer platforms for temporarily storing vertical boats. The boat clamping device is configured to clamp vertical boats. The loading and unloading robot is configured to load or unload solar cells onto the vertical boats located on the boat clamping device. The boat moving device is configured to move vertical boats between the boat feeding device, the boat storage device, the boat clamping device, and the cleanroom platform inside the vertical processing equipment. This invention can significantly increase production capacity and meet the current demand for large-capacity production in the photovoltaic industry.
Owner:S C NEW ENERGY TECH CORP

Installation method of large-volume concrete joint surface joint grouting embedded pipe

The invention discloses a mounting method of a large-volume concrete joint surface joint grouting embedded pipe. The mounting method comprises the following steps: S1, designing a construction drawing for pipeline arrangement of each irrigation area; s2, when a construction warehouse surface position map is drawn, according to the number of layers of the irrigation area corresponding to each construction area, pipeline arrangement in the transverse river direction or pipeline arrangement in the along river direction is selected; s3, when the drawing units are drawn, turning areas of multiple pipelines in a single joint grouting system are determined; s4, the drawing unit further comprises a first turning area site diagram and a second turning area site diagram; and S5, construction site disclosure is carried out, and constructors are supervised to carry out pipeline arrangement construction strictly according to the construction drawing. The possibility of pipeline laying confusion of the hydroelectric dam joint grouting system can be reduced, and the pipeline smoothness is improved.
Owner:CHINA THREE GORGES PROJECTS DEV CO LTD

Integrated assembly and integrated power converter module

The invention discloses an integrated assembly and an integrated power converter module. The integrated assembly comprises an inductor assembly and a first capacitor assembly. The top surface of the integrated assembly is provided with upper surface pins, and the bottom surface is provided with lower surface pins. The inductor assembly comprises a magnetic core and a main winding penetrating through the magnetic core from the top surface to the bottom surface of the magnetic core, the main winding is electrically connected with an upper surface pin and a lower surface pin, the surface of the magnetic core is provided with a capacitor setting area, and the first capacitor assembly is arranged in the capacitor setting area; the bottom surface of the electrode of the first capacitor component and the lower surface pin of the inductor component are coplanar, and the top surface of the first capacitor component is electrically isolated from the surface of the magnetic core. The capacitor assembly is integrated in the power converter module, the path length of an electric loop from the capacitor assembly to an external load is reduced as much as possible, parasitic parameters of the power converter module can be optimized through structure and layout design, and the dynamic performance of the power converter module in a vertical power supply mode is improved.
Owner:SHANGHAI METAPWR ELECTRONICS CO LTD