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Method of repairing damaged film having low dielectric constant, semiconductor fabricating device and storage medium

A low-dielectric constant film, damage repair technology, applied in semiconductor/solid-state device manufacturing, circuits, electrical components, etc., can solve problems such as inability to modify, deviation of dielectric constant from the design value, and molecular impermeability. Effects of suppressing film quality degradation, high in-plane uniformity, and long life

Active Publication Date: 2009-09-02
TOKYO ELECTRON LTD +1
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, this technology is the surface modification of the H substituting the OH group and the above-mentioned silazane-based compound, and the dielectric constant deviates from the design value because it does not return to the state before the plasma treatment.
In addition, since the molecules of the above-mentioned silazane compounds are large, the molecules bonded to the surface of the membrane by substitution with H will cause steric hindrance, the molecules cannot penetrate into the inside of the membrane, and the modification cannot proceed to the inside of the membrane.

Method used

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  • Method of repairing damaged film having low dielectric constant, semiconductor fabricating device and storage medium
  • Method of repairing damaged film having low dielectric constant, semiconductor fabricating device and storage medium
  • Method of repairing damaged film having low dielectric constant, semiconductor fabricating device and storage medium

Examples

Experimental program
Comparison scheme
Effect test

experiment example 1

[0121] (Experimental example 1: Correlation confirmation of processing time and repair amount of repair process)

[0122] like Figure 8 As shown in (a), in the experiment, on a bare silicon wafer with a diameter of 8 inches (200 mm), a test wafer W in which the SiOCH film 54 was formed on the entire surface was used. In order to generate the damaged layer 60 by plasma, the following conditions were used. Perform plasma treatment. Here, the plasma treatment is assumed to be the etching process and the ashing process of the above-mentioned steps 1 and 2.

[0123] (plasma treatment)

[0124] Frequency of upper electrode 4: 60MHz

[0125] Power of upper electrode 4: 300W

[0126] Frequency of lower electrode 31: 2MHz

[0127] Power of lower electrode 31: 0W

[0128] Processing pressure: 1.3Pa (9.75mTorr)

[0129] Process gas: O 2 =300sccm

[0130] Processing time: 10sec

[0131] Next, each of the wafers W subjected to the above-described plasma treatment was subjected t...

experiment example 2

[0145] (Experimental Example 2: Uniformity of In-plane Repair Degree of Wafer W)

[0146] Next, each treatment was performed under the following process conditions.

Embodiment 2

[0148] The plasma treatment and repair process were performed under the same conditions as in Experimental Example 1 except for the following conditions.

[0149] (repair process)

[0150] Processing time: 18 minutes

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Abstract

A method for repairing a damaged film having a low dielectric constant, a semiconductor device fabricating system and a storage medium are provided to repair the damaged layer by supplying CH3 radicals to a low-dielectric-constant film and the damaged layer. Energy is supplied to CH3 radical source gas to produce CH3 radical, and then the CH3 radical is supplied to a low-dielectric-constant film containing silicon, carbon, oxygen and hydrogen and a damaged layer, from which carbon atoms have been eliminated, so that the CH3 radical is bonded to the damaged layer. The damaged layer is formed through by a damaged layer forming process in which the low-dielectric-constant film is exposed to the plasma.

Description

technical field [0001] The present invention relates to a technique for repairing a damaged film of a low-dielectric-constant film containing silicon, carbon, oxygen, and hydrogen, which has been detached from carbon by plasma or the like. Background technique [0002] Semiconductor devices tend to be highly integrated every year. In order to cope with the miniaturization of patterns formed on substrates such as semiconductor wafers (hereinafter referred to as wafers), improvements in resist materials and exposure techniques have been developed. The size of the opening of the die is also reduced accordingly. [0003] On the other hand, in order to achieve high integration, the structure of the device is multi-layered, but in order to increase the operating speed, it is necessary to reduce the parasitic capacitance. Therefore, for insulating films such as interlayer insulating films, materials for low dielectric constant films are also developed. As one of the low-dielectric...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L21/3105H01L21/311H01L21/768
CPCH01L21/3065H01L21/3105H01L21/32136H01L21/76801
Inventor 堀胜久保田和宏
Owner TOKYO ELECTRON LTD