Method for forming contact hole
A contact hole and resist technology, which is used in electrical components, semiconductor/solid-state device manufacturing, circuits, etc., can solve problems such as the inability to make contact holes and contact holes, and the inability to define contact hole patterns.
Active Publication Date: 2009-10-07
UNITED MICROELECTRONICS CORP
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Problems solved by technology
As far as the current yellow light machine technology is concerned, it is impossible to complete contact holes with a pitch of less than 155 nanometers in one exposure process. Therefore, the current common practice in the industry is to use two masks to expose the photoresist layer twice. Etch again to pattern the contact holes
[0004] However, when the pitch of the contact holes is less than 140 nanometers, even if the above-mentioned two-exposure and one-etch process is used, the contact hole pattern cannot be defined too small by the yellow light machine during the second exposure and development. (pattern), but it is impossible to make contact holes with a contact hole pitch smaller than 140 nm
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[0019] Please refer to Figures 1 to 7 , Figures 1 to 7 It is a schematic diagram of the process of etching a contact etch stop layer (contact etch stop layer, CESL) according to the first embodiment of the present invention. Such as figure 1 As shown, a substrate 102 is firstly provided, such as a semiconductor substrate such as a wafer (wafer) or silicon-on-insulator (SOI), and various elements such as metal oxide semiconductor transistors have been formed on the surface of the substrate 102, and then sequentially on the substrate 102 A contact hole etch stop layer 104 , an interlayer dielectric (ILD) 106 , and a three-layer stack layer 114 are formed. The three-layer stack layer 114 includes a bottom anti-reflective coating (BARC) 108 , a silicon-containing photoresist layer 110 and a 193 (nm) nanometer photoresist layer 112 . Wherein, the anti-reflection bottom layer 108 can be formed by using a 365nm photoresist layer, that is, a photoresist layer belonging to the I-li...
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A method for forming a contact hole includes forming a pattern in a photoresist layer and transferring the pattern to a silicon-containing photoresist layer to form a first opening. Then, another pattern is formed in another photoresist layer, which is transferred to the silicon-containing photoresist layer to form a second opening. The first opening and the second opening pattern are then transferred to form a contact hole in the interlayer dielectric layer and the etch stop layer. The present invention can form contact holes with extremely small spacing through two exposures and two etchings.
Description
technical field [0001] The invention relates to a method for forming a contact hole, in particular to a method for forming a contact hole by using more than two times of exposure and more than two times of etching. Background technique [0002] As semiconductor manufacturing technology becomes more and more sophisticated, integrated circuits have undergone major changes, which has led to a rapid increase in computing performance and storage capacity of computers, and has driven the rapid development of peripheral industries. The semiconductor industry is also developing at the speed of doubling the number of transistors on integrated circuits every 18 months, as predicted by Moore's Law. 90 nanometers (nm) (0.09 microns), entering 65 nanometers (0.065 microns process) in 2005 and moving towards 45 nanometers. Therefore, with the advancement of semiconductor technology and the miniaturization of microelectronic elements, the density of semiconductor elements on a single chip...
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IPC IPC(8): H01L21/768H01L21/311
Inventor 周珮玉廖俊雄
Owner UNITED MICROELECTRONICS CORP