Method for planarizing semiconductor structures

Abstract

A method for planarizing a semiconductor structure is disclosed. A semiconductor substrate having a first area and a second area in a second pattern density lower than the first pattern density, is provided. A first dielectric layer is formed above the semiconductor for covering the trenches in the first and second areas. A first chemical mechanical polishing is performed on the first dielectric layer using a predetermined type of slurry for reducing a thickness thereof. The first dielectric layer is then rinsed. A second chemical mechanical polishing is performed on the first dielectric layer using the predetermined type of slurry for further removing the first dielectric layer outside the trenches, thereby reducing a step height variation between surfaces of the first and second areas. Said method in the present can reduce a step height variation between high pattern density area and low pattern density area.

Description

Technical field [0001] The present invention relates to a semiconductor manufacturing process technology, and particularly relates to a method for planarizing a semiconductor structure. Background technique [0002] Chemical mechanical polishing is a process technology used to planarize semiconductor structures. Highly selective polishing slurry (HSS) is often used in the process to polish specific materials. For example, when forming a shallow trench insulation (STI) structure, HSS is often used as a slurry for a chemical mechanical polishing process. Generally speaking, the formation of a shallow trench insulation structure includes a series of process steps, including forming a silicon nitride layer with multiple openings on a semiconductor substrate; using the silicon nitride layer as a mask, etching through the openings, A plurality of trenches are formed on the substrate; a silicon oxide layer is deposited in the trenches and on the silicon nitride layer; then a chemical m...

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Problems solved by technology

Although HSS can be used as a slurry to remove most of the silicon oxide layer, the grinding rate of HSS will gradually decrease, especially in areas with higher trench density on the semiconductor substrate, which will result in high trench density areas and low density areas. The interval forms a step height difference, while divots are formed on the semiconductor substrate

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