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Error correction system and method thereof

一种错误更正、纠错码的技术，应用在数字信号错误检测/纠正、数字记录/再现等方向，能够解决无法克服帧锁定同步偏移、差带宽等问题

Inactive Publication Date: 2010-02-03
MEDIATEK INC
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

If the system does not have a storage element between the demodulator and the pre-PI ECC element, the system cannot overcome the frame lock sync skew problem due to the loss of sync data, and will have poor performance due to the correction period on the data buffer bandwidth

Method used

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  • Error correction system and method thereof
  • Error correction system and method thereof
  • Error correction system and method thereof

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Experimental program
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Embodiment Construction

[0058] Certain terms are used in the description and claims to refer to particular elements. It should be understood by those skilled in the art that hardware manufacturers may use different terms to refer to the same element. The specification and claims do not use the difference in name as a way to distinguish components, but use the difference in function of components as a criterion for distinguishing. "Includes" mentioned throughout the specification and claims is an open term, so it should be interpreted as "including but not limited to". Otherwise, the term "coupled" includes any direct and indirect means of electrical connection. Therefore, if it is described that a first device is coupled to a second device, it means that the first device may be directly electrically connected to the second device, or indirectly electrically connected to the second device through other devices or connection means. the second device.

[0059] figure 2 A block diagram of the error ...

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Abstract

Disclosed is an error correction system, comprising: a demodulator for receiving and demodulating raw data to generate an ECC block; an on the fly PI ECC decoder, coupled to the demodulator, for performing a PI ECC operation on the ECC block; a data buffer, for storing the ECC block; a non-linear EDC check device, for performing a non-linear EDC operation to generate an EDC result; a syndrome generator for generating at least one syndrome according to a PI codeword and a PO codeword of the ECC block; an ECC decoder for performing an ECC operation according to the syndrome; and an EDC correctorfor correcting the EDC result according to a result of the ECC operation; wherein the syndrome comprises at least one of a PI syndrome and a PO syndrome, and the ECC decoder performs the ECC operation after the PI ECC operation.

Description

technical field [0001] The present invention relates to an error correction system, in particular to an error correction system and method for an optical drive. Background technique [0002] With the advancement of technology, the types of optical discs and the types of data stored thereon are also increasing. Therefore, optical disc drives need error detection and correction mechanisms to ensure that correct data is read. [0003] figure 1 A related art error correction system 100 is shown. Such as figure 1 As shown, the error correction system 100 includes a data buffer 101, a demodulator 103, a syndrome generator 105 (syndromegenerator), a syndrome memory 107, an error correction code (ECC: error correction code) decoding device 109 , a linear error detection code (EDC: error detection code) confirming element 111 , an EDC memory 113 and an EDC corrector 115 . In this example, when the amount of data stored in the data buffer 101 is sufficient for decoding, the ECC bl...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G11B20/18
Inventor 简国龙
Owner MEDIATEK INC