Simulator and method for bus arbitraction

Abstract

An simulation device of bus arbitration is prepared as adding a bus arbitrator in simulation model of ARMulator to let operation of access bus on all bus master units including ARM Core pass arbitration of said bus arbitrator first, enabling to make access on bus slave unit and to obtain required return-back value only after bus is obtained.

Description

technical field [0001] The invention relates to a bus arbitration simulation algorithm, in particular to an AMBA bus arbitration simulation algorithm based on an ARMulator simulation platform. technical background [0002] A complex SOC chip system takes the system bus as the core, and all devices, including the CPU, participate in the competition for bus resources. At this time, in order to effectively manage the bandwidth of the system bus, and effectively enable each bus master to access the bus in an orderly manner, so as to optimize the performance of the entire system, a bus arbiter must be provided. [0003] With ARM as the core chip, there is a system bus in the chip. Some are the bus specifications defined by each SOC manufacturer, and more directly use the AMBA bus of ARM Company. [0004] However, the existing ARMulator simulation model based on the AMBA bus, if you want to simulate a bus master like DMA that can independently access the slave device, according ...

AI Technical Summary

Problems solved by technology

Therefore, the ARMulator simulation model cannot accurately simulate a SOC system with multiple bus masters. Therefore, there is an urgent need for an arbitration mechanism that can control each bus master to access slaves, which can truly reflect the actual bus usage.

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