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Method for controlling packet channel of master-slave mode multiprocessor system

A multi-processor system and channel control technology, applied in transmission systems, digital transmission systems, store-and-forward switching systems, etc., can solve problems such as exhaustion of processor resources and starvation of low-priority queues, and achieve the effect of avoiding congestion

Active Publication Date: 2011-06-08
MAIPU COMM TECH CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0006] The technical problem to be solved by the present invention is to provide a master-slave multi-processor message channel control between the master-slave processors in view of the disadvantages of the prior art that the processor resources are easily exhausted and the low-priority queues are starved to death. method

Method used

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Effect test

Embodiment

[0032] In the asymmetric dual-processor routing system, one slave processor implements fast forwarding of messages, and one master processor implements system control and processing of special messages. In such a system, the message channel from the processor to the main processor may be congested, and the present invention can better solve this problem.

[0033] The present invention does not rely on other auxiliary tasks to be completed, and all actions are triggered by the queue entry request of the slave processor, so all actions are executed on the slave processor.

[0034] In the system state machine, set the threshold q1>q2>q3>q4 of the idle rate q:

[0035] Threshold q1 indicates a high idle rate;

[0036] Threshold q2 indicates that the idle rate starts to alarm;

[0037] Threshold q3 indicates a low idle rate;

[0038] Idle rate < q3, the queue is no longer idle;

[0039] The idle rate is as low as q4, and some interfaces start to drop packets.

[0040] The work...

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PUM

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Abstract

The invention relates to control to message channel in Router. Aiming that prior master-slave type multiprocessor system easy leads to disadvantages of processor resources exhausted and low priority queue starved, the invention discloses a message channel control method between master processor and slave processor of master-slave type multiprocessor. The technical scheme is that: the message channel control method in master-slave type multiprocessor system has characteristics in that: switching system state according with channel queue leisure rate q; adjusting system strategy in various system state, and discarding message forwardly before channel congesting. The method has advantage of avoiding congesting from mechanism. When high-speed interface is packed with great capacity, low-speedinterface does not lead to link disconnection interface obstructed because of losing keep alive packet; when message with great capacity comes, message required prior ensuring can be ensured; when attack message comes fiercely, phenomenon of other normal message oblivion can be mitigated greatly.

Description

technical field [0001] The invention relates to the router technology adopting the master-slave multiprocessor in the communication system, in particular to the control of the message channel in the router. Background technique [0002] In a master-slave multiprocessor router, generally the slave processor is used for message forwarding, and a master processor is used for control and processing of special messages. In the message channel from the processor to the main processor, a large number of messages need to be transmitted, such as link control messages, local routing protocol messages, IP forwarding messages lacking fast forwarding records, Special packets that are strictly checked by the firewall function, etc. If the message channel is not handled properly, congestion may occur, resulting in system failure. For example: due to the high-speed interface filling a large number of packets, the key packets of the low-speed interface such as keepalive (keep alive packets...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H04L12/56H04L29/06H04L12/54
CPCH04L47/323H04L47/10H04L47/6285H04L12/5693H04L47/50
Inventor 刘奇志徐放
Owner MAIPU COMM TECH CO LTD
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