General register renaming method and microprocessor possessing general register renaming

Abstract

A unified register rename mechanism for targets of different instruction types is provided in a microprocessor. The universal rename mechanism renames destinations of different instruction types using a single rename structure. Thus, an instruction that is updating a floating point register (FPR) can be renamed along with an instruction that is updating a general purpose register (GPR) or vector multimedia extensions (VMX) instructions register (VR) using the same rename structure because the number of architected states for GPR is the same as the number of architected states for FPR and VR. Each destination tag (DTAG) is assigned to one destination. A floating point instruction may be assigned to a DTAG, and then a fixed point instruction may be assigned to the next DTAG and so forth. With a universal rename mechanism, significant silicon and power can be saved by having only one rename structure for all instruction types.

Description

General-purpose register renaming method and microprocessor with general-purpose register renaming technical field The present application generally relates to improved data processing systems and methods. More specifically, the present application relates to a general-purpose register renaming mechanism for the targets of different instruction types in a microprocessor. Background technique Register renaming is a well-known technique used in microprocessor design to improve performance by allowing instructions to be executed out of order. A program consists of instructions that operate on numeric values. Instructions must name these values ​​to distinguish them from each other. A typical instruction could be, for example: add X and Y, and put the result in Z. In this instruction, X, Y, and Z are the names of storage locations. In order to have a compact instruction encoding, most processor instruction sets have a small set of specific locations that can be named direc...

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Problems solved by technology

All these renaming structures and logic are often very complex and expensive in terms of power and silicon

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