Bumpless flip-chip assembly with a compliant interposer contractor
A transfer layer, contact pad technology, applied in electrical components, electrical solid devices, semiconductor devices, etc., can solve problems such as increasing the complexity of packaging, and achieve the effect of reducing the manufacturing infrastructure and realizing batch components
Inactive Publication Date: 2010-11-24
NXP BV
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- Description
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Problems solved by technology
Also, flip-chip provides a robust, high-performance electrical connection, however, the flip-chip bumping process adds complexity to the package because the bump pads must be attached to the bond pad connections of the IC device thereby allowing the IC device to be attached to the package substrate
Method used
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Consistent with an example embodiment, an integrated circuit device (IC) is assembled on a package substrate and encapsulated in a molding compound. There is a semiconductor die having a circuit pattern with contact pads. A package substrate having bump pad landings corresponding to the contact pads of the circuit pattern, has an interposer layer sandwiched between them. The interposer layer includes randomly distributed mutually isolated conductive columns of spherical particles embedded in an elastomeric material, wherein the interposer layer is subjected to a compressive force from pressure exerted upon an underside surface of the semiconductor die. The compressive force deforms the interposer layer causing the conductive columns of spherical particles to electrically connect the contact pads of the circuit pattern with the corresponding bump pad landings of the package substrate. The compressive force may be obtained from forces generated by thermal expansion properties of the molding compound and package substrate, metal clips or combinations, thereof.
Description
Bump-free flip-chip assembly with adapted transition contacts technical field The present invention relates to integrated circuit (IC) packaging. In particular, the present invention relates to assembling IC devices in a flip-chip structure in which bump formation processes are eliminated. Background technique The electronics industry continues to rely on advances in semiconductor technology to achieve higher performance devices in more compact areas. For many applications, achieving higher performance devices requires integrating a large number of electronic devices onto a single silicon wafer. As the number of electronic devices per unit of silicon wafer area increases, the manufacturing process becomes more difficult. Many semiconductor devices have been produced that have a variety of applications in various disciplines. Such silicon-based semiconductor devices typically include metal oxide semiconductor field effect transistors (MOSFETs), such as p-channel MOS (PM...
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IPC IPC(8): H01L23/48
CPCH01L24/83H01L2924/15311H01L2924/014H01L2224/16H01L2224/2919H01L2924/16152H01L2924/13091H01L2924/0132H01L2924/01005H01L2924/01033H01L2924/01075H01L2924/01082H01L2224/32225H01L2224/838H01L2924/01079H01L2924/10329H01L2924/01015H01L23/3121H01L2924/10253H01L24/72H01L23/49827H01L2924/0665H01L2924/01006H01L2924/01078H01L2924/19043H01L2924/14H01L2924/01023H01L24/90H01L24/29H01L24/32H01L24/91H01L2224/3201H01L2224/73251H01L2224/83901H01L2224/83904H01L2924/1305H01L2924/1306H01L2924/181H01L2924/00H01L2924/01031H01L2224/72H01L2224/32
Inventor 韦恩·纳恩
Owner NXP BV
