Long delay circuit

Abstract

The invention relates to a fixed delay circuit which comprises a signal input terminal, a delay signal output terminal, a resistance and capacitance delay circuit and a comparer. The signal input terminal is used for receiving an input signal. The delay signal output terminal is used for outputting the input signal which is delayed for a preset time. The resistance and capacitance delay circuit is coupled to the signal input terminal and used for receiving the input signal and outputting a voltage signal. The comparer comprises a first input terminal, a second input terminal and an output terminal. The first input terminal of the comparer is coupled to the resistance and capacitance delay circuit for receiving the voltage signal. The second input terminal of the comparer is used for receiving a reference voltage. The output terminal of the comparer is coupled to the delay signal output terminal. The compared results are output by the comparer as a delay signal by the output terminal of the comparer according to the reference voltage and the voltage signal. Thereby the shortcoming of the delay time difference caused by phase inverter process in the prior art and constant delay time can be provided by a long-time delay circuit.

Description

technical field [0001] The present invention relates to a long-time delay circuit with fixed delay, more specifically, relates to a long-time delay circuit with a reference potential as the reference to control the length of the delay time. Background technique [0002] Please refer to figure 1 , figure 1 It is a schematic diagram of a long-time delay circuit 100 of the prior art; the long-time delay circuit 100 includes a delay signal input end, a delay signal output end, an inverter INV 1 、INV 2 , resistance R 1 , capacitance C 1 . [0003] The delay signal input terminal of the long-time delay circuit 100 is used to receive the input signal V IN , its delayed signal output terminal is used to output the delayed signal V OUT . [0004] Inverter INV 1 The input terminal of is coupled to the delay signal input terminal of the long-time delay circuit 100 to receive the input signal V IN , and outputs the inverted input signal V IN . [0005] Resistance R 1 Couple...

AI Technical Summary

Problems solved by technology

Therefore, the delay time of the long-term delay circuit 100 will be affected by the inverter INV 2 Due to the impact of the manufacturing process, the difference in delay time will cause inconvenience to users

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