Split joint display parallel processing system

A parallel processing and splicing display technology, applied in the parts of the TV system, digital output to display devices, static indicators, etc., can solve the problems of high cost of splicing display system, complicated production and debugging, inconvenient installation and maintenance, etc. The effect of reducing development cost, fast processing rate and high refresh rate

Active Publication Date: 2009-02-18
GUANGDONG VTRON TECH CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

Therefore, the cost of the splicing display system using such an image overlay controller is relatively h

Method used

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  • Split joint display parallel processing system
  • Split joint display parallel processing system
  • Split joint display parallel processing system

Examples

Experimental program
Comparison scheme
Effect test

Example Embodiment

[0026] Example one

[0027] Such as figure 2 In this embodiment, the splicing display parallel processing system of the present invention includes a desktop processor, a signal receiving processor, an overlay selection circuit 1, an overlay selection circuit 2; the output terminal of the desktop processor and the signal receiving processor The output terminals of are respectively connected to the input terminals of the superposition selection circuit 1 and the superposition selection circuit 2.

[0028] The desktop processor generates desktop image information and outputs them to the corresponding overlay selection circuit respectively; the signal receiving processor is used to receive the input video image, perform display processing (including windowing, zoom processing, and partial overlay), respectively Output to the overlay selection circuit 1 and the overlay selection circuit 2; the overlay selection circuit 1, the overlay selection circuit 2 and respectively receive the de...

Example Embodiment

[0042] Example two

[0043] Such as image 3 In this embodiment, the splicing display parallel processing system of the present invention includes 4 divided output circuits, 4 superimposed selection circuits, 3 signal receiving processors, and 1 desktop processor. The desktop processor is also equivalent to a processor. The output of the desktop processor is connected to 4 superposition selection circuits, and the output of each signal receiving processor is connected to 4 superposition selection circuits, 4 superposition selection circuits and 4 The divided output circuits are connected one by one.

[0044] Each signal receiving processor and desktop processor can be equipped with RGB signal input acquisition circuit or video input acquisition circuit. Each signal receiving processor and desktop processor can be plugged into two graphics cards, each graphics card has two Dual DVI (dual link DVI) display output, a total of 16 display outputs. In order to synchronize the video imag...

Example Embodiment

[0047] Example three

[0048] This embodiment is a further improvement of the second embodiment, Figure 4 The adjustment scheme of this embodiment to the second embodiment is shown. In this embodiment, the splicing display parallel processing system of the present invention further includes a video acquisition circuit 1 and a video acquisition circuit 2, wherein the output terminals of the video acquisition circuit 1 are connected to The input end of the signal receiving processor 3 and the signal receiving processor 4 are connected, and the output ends of the video acquisition circuit 2 are respectively connected to the input ends of the signal receiving processor 3 and the signal receiving processor 4; the input ends of the video acquisition circuit are used for Collect a video image, and divide the collected video image into two parts. One part of the video image is output to one of the signal receiving processors, and the other part of the video image is output to the other s...

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Abstract

The invention discloses a spliced display concurrent processing system, comprising a desktop processor, at least one signal receiving processor and at least one superposition selecting circuit; an output end of the desktop processor and an output end of the signal receiving processor are respectively connected with an input end of the at least one superposition selecting circuit. The signal receiving processor receives and transfers input video images to the superposition selecting circuit after a display processing, the superposition selecting circuit performs a superposition processing to the received video images in accordance with location superposition information transmitted by the desktop processor, and then transmits the video images to a corresponding display unit for output. Various parts of the inventive spliced display concurrent processing system do not occupy scarce computer resources mutually, which fully guarantees respective processing abilities of the desktop processor, the signal receiving processor and the superposition selecting circuit, such that the inventive spliced display concurrent processing system can run effectively, process at the rapid rate, has high refresh rate and lower development cost, maintenance cost and update cost.

Description

Technical field [0001] The invention relates to the field of electronic display systems, in particular to a splicing display parallel processing system. Background technique [0002] As a new type of display device, the splicing display processing system has been widely used. The performance requirements are getting higher and higher, especially the requirements for display speed. For example, the refresh rate of 3D images with more than 5 million pixels is 60Hz, which puts forward new requirements for the transmission rate of display signals; mosaic display walls are in addition to displaying computer desktops or large-scale applications In addition, display output signals from surveillance cameras, DVD players, computers, network display data, and IP video data. For the image information collected by each image acquisition channel, it is usually necessary to superimpose the display output on the entire mosaic display wall. [0003] figure 1 It is a spliced ​​display processin...

Claims

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Application Information

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IPC IPC(8): H04N5/265G09G5/00G09G5/14G06F3/14
Inventor 卢如西
Owner GUANGDONG VTRON TECH CO LTD
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