Data processing hardware for non-negative matrix factorisation

Abstract

This invention generally relates to data processing hardware, and more particularly to hardware accelerators and related methods for matrix factorisation especially non- negat ive matrix factorisation (NMF). Embodiments of the invention are particularly useful for driving electroluminescent displays such as OLED displays. A matrix factorisation hardware accelerator for determining a pair of factor matrices (R; C) which when multiplied together approximate a target matrix, the hardware accelerator comprising: an input to receive an input data matrix representing said target matrix; a first factor matrix memory for storing row and column data for a first factor matrix (R), said first factor matrix memory having a plurality of first data buses each associated with a respective block of said first factor matrix memory for accessing first factor matrix column data stored in the block; a second factor matrix memory for storing row and column data for a second factor matrix (C), said second factor matrix memory having a plurality of second data buses each associated with a respective block of said second factor matrix memory for accessing second factor matrix row data stored in the block; a matrix of processor blocks, each processor block having: a first processor block data bus coupled to one of said first data buses, a second processor block data bus coupled to one of said second data buses, and a result data output; a processor memory block for storing a portion of a matrix (Q) representing a difference between a product of said pair of factor matrices and said target matrix; and a data processor.

Description

technical field [0001] The present invention relates generally to data processing hardware, and more particularly to hardware accelerators and related methods for matrix factorization, especially non-negative matrix factorization (NMF). Embodiments of the present invention are particularly useful for driving electroluminescent displays such as OLED (Organic Light Emitting Diode) displays. Background technique [0002] It was previously described how techniques for non-negative matrix factorization (NMF) can be advantageously employed in driving OLED displays (see International Application PCT / GB2005 / 050219, which is hereby incorporated by reference). A hardware embodiment is now described that implements these techniques, and in particular addresses the problem of performing the very large number of calculations needed to produce a real-time display fast enough. The preferred embodiment will be described with reference to display drivers, but the skilled artisan will unders...

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Problems solved by technology

In practice this is limited by the shortest selectable subframe time as well as the maximum column drive current, but since the tuning is a second order optimization this need not be an issue

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