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Single-precision floating-point data storing method and processor

A floating-point data, single-precision technology, applied in the direction of electrical digital data processing, digital data processing components, memory systems, etc., can solve problems such as processor performance degradation

Inactive Publication Date: 2009-09-23
FUJITSU LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

This results in degradation of processor performance

Method used

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  • Single-precision floating-point data storing method and processor
  • Single-precision floating-point data storing method and processor
  • Single-precision floating-point data storing method and processor

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Embodiment Construction

[0027] Embodiments according to the present invention will be described below with reference to the drawings.

[0028] First, a processor according to an embodiment of the present invention will be described.

[0029] The configuration of the floating-point registers in SPARC-V9 is explained above. The following describes the floating-point register in detail for the processor according to the embodiment of the present invention.

[0030] Such as figure 2 As shown, a register called an extended arithmetic register (XAR) is updated by using an extended prefix instruction. In such a processor, a region indicated by a floating point register address is extended. That is, the region of the floating point register is extended by modifying the instruction to access the floating point register with the extended prefix instruction. For example, the number of double-precision floating-point registers (8 bytes) is increased to 256 by adding 3 bits of an extended arithmetic register ...

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Abstract

A single-precision floating-point data storing method for use in a processor including a register, which has a size that can store double-precision floating-point data, for storing double-precision floating-point data and single-precision floating-point data comprises writing input single-precision floating-point data to the high-order half of the register, and writing all zeros to the low-order half of the register if a single-precision floating-point data process is specified.

Description

technical field [0001] The present invention relates to a processor and a single-precision floating-point data storage method used in the processor. Background technique [0002] In order to improve the performance of the processor, there is a bypass function in which when an arithmetic operation is performed by obtaining input data for the arithmetic operation, before the result of the previous instruction is output from the arithmetic unit and written into the floating-point register, the data from the arithmetic unit is used. The output data is used as the subsequent input data. Performing this bypass function requires circuitry for detecting dependencies on previous instructions. [0003] Meanwhile, for example, in the SPARC-V9 (SPARC: registered trademark) architecture, the register address of the floating-point register is 5 bits. Therefore, there can be 32 instructions. figure 1 Indicates the configuration of floating-point registers in the SPARC-V9 architecture. ...

Claims

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Application Information

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IPC IPC(8): G06F9/302G06F9/318
CPCG06F9/30043G06F9/30112G06F9/3016G06F9/30185G06F9/3824G06F7/483G06F9/06
Inventor 吉田利雄
Owner FUJITSU LTD
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