Storage module and method storing same

Abstract

The invention provides a storage module which comprises a plurality of storage sub-modules and a plurality of groups of input pins, wherein each storage sub-module comprises a plurality of storage chips which are connected in series; in addition, the input pins are respectively coupled to the storage sub-modules and used for receiving a plurality of same input signals, wherein each group of input pins comprises a plurality of input pins used for transmitting the input signals to the corresponding storage sub-module.

Description

technical field [0001] The present invention relates to a memory module, in particular to a memory module capable of improving the rise / fall time of an input signal and increasing the setup / hold time and a method for accessing the memory module. Background technique [0002] refer to figure 1 , figure 1 It is a schematic diagram of a conventional dual in-line memory module (Dual In-line Memory Module, DIMM) 100 . Such as figure 1 As shown, the dual in-line memory module 100 includes eight memory chips 110_1˜110_8, and each memory chip includes 29 input pins. On the operation of the dual in-line memory module 100, such as figure 1 As shown, the 29 input signals are generated by a controller 120, and are input to the memory chip 110_1 through input pins (not shown), and then sequentially transmitted to the memory chips 110_2, 110_3, . . . , 110_8. However, the back-end The memory chip (such as 110_7, 110_8) will increase the rising time (rising time) and falling time (fal...

AI Technical Summary

Problems solved by technology

like figure 2 As shown, the memory chip at the rear end has a smaller eye width (eye width) W, especially the eye width of the last memory chip 110_8 is 919 pico-seconds (pico-second), which is far smaller than the eye width of the memory chip 110_1 ( 1057 picoseconds), so for the back-end memory chip, the setup time of the higher-frequency signal may be insufficient, resulting in unstable signal and easy to cause errors in data interpretation

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