Memory chip

Abstract

A memory system has a memory controller and a plurality of memories. The plurality of memories are connected via a switch to an end of a bus, which is connected to the memory controller, wherein the plurality of memories are controlled by the switch. By suppressing reflection and loads on the bus, a higher data transmission speed can be obtained.

Description

[0001] This application is a PCT international application with the international filing date of June 20, 2001 and the international application number PCT / JP01 / 05270, which has entered the Chinese national phase, and the national application number is 01811401.6, entitled "High-speed storage system" Divisional application of the application. technical field [0002] The present invention relates to a high-speed storage system, and more particularly, to a storage system with higher transmission speed and higher operating speed, and to a storage interface and a storage chip for such a storage system. Background technique [0003] Figure 18 A traditional storage system is shown. In this figure, a bus 1802 connected to a storage controller 1801 extends in one direction, and is installed in a plurality of ( Figure 18 A plurality of storage modules 1804 on the storage chip 1803 are connected to the bus 1802 in parallel with each other. In this paper, such a bus-connected struc...

AI Technical Summary

Problems solved by technology

[0005] However, since in this structure, a plurality of memory chips or memory modules are respectively connected to the extended bus at their corresponding positions, some problems arise: high-level reflection on the transmission line; and a large amount of load (fan-out) arrangement on the transmission line, thus making it difficult to increase the transmission speed on the bus

[0013] However, if the data distortion is not negligible, i.e., if the transmission speed of the data is high and such that the data distortion is not negligible compared to the data speed, then by using a single clock pulse, 8-bit data cannot be acquired within the same time limit

Like this, in the conventional memory chip, one of the limitations on the transmission speed of the data being transmitted is exactly: because the length difference of the transmission line has produced a plurality of data distortions between each other, can not be transmitted in the memory chip as mentioned above. acquired within the same time frame

[0014] To sum up, the first problem in the conventional technology is that since the memory chips or memory modules are connected to the extended bus at their respective positions, a large amount of reflection occurs on the transmission line and the load on the transmission line (number of fan-outs) increases, thereby making it difficult Difficult to increase transfer speed on the bus

[0015] The second problem in the conventional technology is that since the memory chips or memory modules are connected to the extended bus at their respective positions, the data distortion due to the length difference of the transmission line cannot be ignored

[0016] The third problem in traditional technology is that there may be failures due to no effective measures to prevent data distortion

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