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Inner-loop and outer-loop matching method in surface-surface stack processing

A technology of superposition processing and ring matching, which is applied in the fields of electrical digital data processing, special data processing applications, instruments, etc., can solve the problems of excessive system overhead, calculation errors, and inapplicability, and achieves the goal of improving computing efficiency and reducing the amount of calculation. Effect

Inactive Publication Date: 2009-12-02
北京中科通图信息技术有限公司
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

Using the point-in-polygon-test method requires a lot of calculations, and the system overhead is too large; and for some complex situations (such as the case where there is an outer ring in the hole, and the outer ring has a corresponding inner ring), this This method may lead to calculation errors and cannot be applied

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  • Inner-loop and outer-loop matching method in surface-surface stack processing
  • Inner-loop and outer-loop matching method in surface-surface stack processing

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Experimental program
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Embodiment

[0028] The method for realizing the matching of inner and outer rings in this embodiment mainly includes three aspects.

[0029] The first aspect is that each original polygon input into the system needs to be given an ID, and the inner and outer rings belonging to the same polygon have the same ID.

[0030] The second aspect is that in the process of surface-to-surface superposition, the newly generated inner and outer rings inherit the ID of the initial polygon in the superposition operation according to certain rules.

[0031] The third aspect is to match the inner and outer rings with the same ID according to the IDs of the inner and outer rings to form a complete result polygon.

[0032] The key of this embodiment is how to carry out ID inheritance in face-to-face overlay. This process is described in detail below.

[0033] In this embodiment, the polygons participating in the superposition operation must be legal polygons, and multiple legal polygons can constitute a l...

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Abstract

The invention provides an inner-loop and outer-loop matching method in surface-surface stack processing, comprising the following steps: 1) before the surface-surface stack processing, the ID of each initial polygonal which participates in the stack is input or read, an inner-loop and an outer-loop belonging to a same polygonal have a same ID; 2) in the surface-surface stack process, the ID of each initial polygonal of superposition algorithm is inherited by the newly generated inner-loop and outer-loop; 3) according to the ID of the inner-loop and outer-loop, the inner-loops are matched withthe outer-loops with the same ID to form integrated result polygonals. The calculated amount of inner-loop and outer-loop matching is greatly reduced by the invention. Particularly when a plurality of polygonals are in the result of generating, the computational efficiency can be significantly improved. Some complicated inner-loop and outer-loop matching can be solved by the invention, which can not be achieved by the existing point-in-polygon-test.

Description

technical field [0001] The invention relates to a spatial overlay analysis algorithm applied in a geographic information system, in particular, the invention relates to an inner-loop and outer-loop matching method in surface overlay processing. Background technique [0002] Geographic Information System (GIS) is a specific and very important spatial information system. It is a technical system that collects, stores, manages, calculates, analyzes, displays and describes the relevant geographical distribution data in the entire or part of the earth's surface (including the atmosphere) space with the support of computer hardware and software systems. The core of the geographic information system is to process spatial geographic data, including point-plane superposition, line-plane superposition and plane-plane superposition. The present invention mainly relates to an inner-ring and outer-ring matching method in the analysis and processing of plane-plane superposition. [0003]...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06F17/30
Inventor 郎兵朱效民刘炎方金云
Owner 北京中科通图信息技术有限公司