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Method of manufacturing electronic components having bump

A technology of electronic components and bumps, which is applied in the manufacture of electrical components, electrical solid devices, and printed circuits, and can solve problems such as insufficient flux transfer

Inactive Publication Date: 2010-02-24
NEC ELECTRONICS CORP
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, a problem that occurs is that when there is a closed recess with respect to the periphery at the contact surface between one end and the other in the process of forming such an uneven portion, flux accumulates in the portion so that the flux is not sufficiently sent to the periphery

Method used

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  • Method of manufacturing electronic components having bump
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  • Method of manufacturing electronic components having bump

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Embodiment Construction

[0027] Now, the present invention will be described herein with reference to exemplary embodiments. Those skilled in the art will recognize that many alternative embodiments can be accomplished using the teachings of the present invention and that the invention is not limited to the embodiments illustrated for explanatory purposed.

[0028] Preferred embodiments of the present invention will now be described with reference to the accompanying drawings. In all the drawings, like reference numerals are respectively assigned to like components, and descriptions thereof will be omitted as occasion demands.

[0029] Figure 1A and Figure 1B is a cross-sectional view of an electronic assembly related to the present invention. Figure 1A A state in which the second wiring substrate 400 has been subjected to positioning relative to the first wiring substrate 100 is shown, and Figure 1B is a view showing a state where heat treatment is performed after subjecting the second wiring sub...

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PUM

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Abstract

The invention provides a method of manufacturing electronic components having bump. An electronic component manufacturing method including: a step of mounting a bump formation material on a first wiring substrate 100 to melt the bump formation material to form a bump 200 at the wiring substrate 100; a step of pressing a jig onto the bump 200 to form a recessed portion 220 having a front end portion 202; a step of printing a solder paste 420 onto an electrode 410 of a second wiring substrate 400; a step of performing, on the solder paste 420, positional alignment of the bump 200 on the wiring substrate 100 to allow the front end portion 202 to be in contact with the bump; and a step of heating the wiring substrate 400 on which the wiring substrate 100 is mounted, wherein the recessed portion 220 is formed from the bump front end portion 202 toward an outer periphery 230 in contact with the solder paste 420.

Description

[0001] This application is filed based on Japanese Patent Application No. 2008-212645. technical field [0002] The present invention relates to a method of manufacturing an electronic component having a wiring substrate and a bump (bump) and a method of mounting the substrate, and more particularly, to a method of manufacturing an electronic component having a function of suppressing connection time. Yield reduction capability. Background technique [0003] A technique for mounting a wiring substrate mounted with a semiconductor chip on another substrate such as a mother board provides a technique of mounting bumps as external connection terminals on the wiring substrate to connect the wiring substrate and other substrates through the bumps. [0004] In Japanese Patent Laid-Open No. 2003-218161, a technique involving a solder bump flattening jig for flattening apex portions of a plurality of solder bumps so that they are flush with each other is disclosed. In Japanese Pate...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L21/48H01L21/60
CPCH05K2203/0195H01L2924/01019H01L21/4853H01L2924/01078H01L23/49816H01L2924/01079H05K2203/0465H05K3/3436H01L2224/16H01L2224/0554H01L2224/05567H01L2224/05573H01L2924/00014Y02P70/50H01L2224/05599H01L2224/0555H01L2224/0556
Inventor 小川健太
Owner NEC ELECTRONICS CORP
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