Transmission device and transmission method for direct memory access
A transmission device and memory technology, applied in the fields of instruments, electrical digital data processing, sustainable buildings, etc., can solve the problems of inability to achieve timing transmission, inability to completely separate from the system, inability to balance system power consumption and transmission effect, etc. The effect of low system power consumption and reduced power consumption
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Embodiment 1
[0036] The structure of Embodiment 1 of the direct memory access transmission device of the present invention is as follows figure 1 As shown, it includes a three-dimensional DMA control module 100 , a first data terminal 104 , a second data terminal 105 , a storage task module 109 , a first clock 106 , a second clock 107 and a third clock 108 .
[0037] The three-dimensional DMA in the present invention refers to the addition of a time dimension on the basis of the two-dimensional DMA described in the prior art, and all the three-dimensional DMAs in the present invention are explained in this way.
[0038] The 3D DMA control module 100 includes: a time control module 101 , a time transmission control module 102 , a first FIFO module 103 , a 2D task transmission control module 111 , a 2D task register 110 and a task retrieval module 112 .
[0039] The time control module 101 is used to configure the time dimension and the priority of each operation trigger point on the time di...
Embodiment 2
[0071] The DMA transmission device described in this embodiment is based on link DMA, and is characterized by including multiple tasks at a single time point. The specific structure of the DMA transmission device is basically the same as that of the DMA transmission device described in Embodiment 1. One feature of link DMA is that there are n tasks at an operation trigger point, and another feature is that each task packet contains both the task content and the storage address of the next task packet.
[0072] The working principle of the DMA transmission device described in this embodiment is basically the same as that described in Embodiment 1:
[0073] The central processing unit CPU 300 configures the DMA transmission device through the second FIFO module 301 , that is, configures the time control module 101 and the two-dimensional task register 110 in the three-dimensional DMA control module 100 respectively.
[0074] Wherein, the configuration of the time control module ...
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