Chip package structure
A chip packaging structure and chip technology, applied in the direction of electrical components, electric solid devices, circuits, etc., can solve the problems of affecting the heat sink, the design freedom of components is small, and the distance along the surface and the space distance cannot be effectively increased, so as to increase the space distance , the effect of increasing the distance along the surface
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[0035] figure 2 A cross-sectional view of a chip package structure according to an embodiment of the present invention is shown. Figure 3 ~ Figure 8 draw figure 2 Cross-sectional views of various variations of the insulating sheet in .
[0036] Please refer to figure 2 The chip packaging structure 200 of this embodiment includes a substrate 210 , at least one chip 220 , a plurality of leads 230 , a heat dissipation component 240 , an encapsulant 250 and at least one insulating sheet 260 .
[0037] The substrate 210 has a first surface 212 and a second surface 214 opposite to the first surface 212 . The substrate 210 can be a printed circuit board (PCB), a copper-clad ceramic substrate (DCB), an aluminum-clad ceramic substrate (DAB), an insulated metal substrate (IMS), or a lead frame.
[0038] The chip 220 is disposed on the substrate 210 . In this embodiment, there are multiple chips 220 disposed on the first surface 212 of the substrate 210, and can be electrically ...
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