JTAG port controller

Abstract

The invention relates to a JTAG port controller. The controller at least contains an instruction register, an instruction decoding module, a first data register, a port register, a state machine control module, a first gate, a second gate, a signal combining module and a signal separating module, wherein the first gate receives the serial data information of the data input port of a test accessing port and successively outputs single-bit information from one output port; the signal combining module combines the information from the first bit to the biggest bit of the first data register with the single-bit information to form parallel data information; the first data register is a rising edge triggering register; the signal separating module separates the zero-bit information from the other bit information of the parallel data information outputted by the first data register; and the port register is a falling edge triggering register. The JTAG port controller has the advantage of performing write operation so as to instantly observe the change of information during the debugging process.

Description

technical field [0001] The invention relates to the technical field of integrated circuit testing, in particular to the field of JTAG (Joint Test Action Group) port controllers. Background technique [0002] Since the 1980s, with the widespread application of computer embedded systems, microcontrollers (MCU, microcontroller unit / single-chip microcomputer) have developed rapidly. The early single-chip microcomputer is a single-chip integrated circuit device of the computer designed according to the requirements of embedded application technology, that is, all the characteristic devices of the electronic computer are integrated on one chip, so it is vividly called a single-chip microcomputer. With the increasing application range of single-chip microcomputers, the requirements for its simulation and debugging functions are also gradually increasing. [0003] At present, almost all high-speed embedded processors use JTAG emulation to debug modules. It extends the IEEE1149.1 p...

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Problems solved by technology

Because a read register operation must be performed, it is a waste of time

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