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High speed arithmetic device and method of elliptic curve code

A technology of elliptic curve cryptography and operation method, which is applied in the field of elliptic curve cryptography, can solve problems such as unsatisfactory performance, achieve the effect of small structural space and improve hardware efficiency

Active Publication Date: 2010-07-21
BEIJING HUADA INFOSEC TECH
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AI Technical Summary

Problems solved by technology

But so far, the performance of most of the computing devices about the elliptic curve cryptographic algorithm still does not meet the actual requirements, that is, the average point multiplication performance per second is all below 1000 times per second (here the modulus length on the prime field is 192 bits) The general elliptic curve is used as a reference, and it works at a frequency of 10MHz)

Method used

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Embodiment Construction

[0119]The present invention is based on the special hardware structure of the dual-mode multiplier of flowing water pulsation. The dot product algorithm adopts the dot product algorithm of NAF encoding. The dot multiplication algorithm can be decomposed into dot addition and dot multiplication. And when adopting the dot multiplication algorithm of NAF code, the adjacent point operation sequence that point addition operation and doubling operation appear mainly includes: dot addition -> dot doubling, dot doubling -> dot doubling, dot doubling -> dot addition, namely The subsequent operation of point addition is point multiplication; the subsequent operation of point multiplication is point addition or point multiplication. In the present invention, the point addition and point multiplication operation sequences of the modified Jacobian coordinate points are rearranged.

[0120] figure 1 Schematically shows a high-speed computing device according to an embodiment of the prese...

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Abstract

The invention relates to a high speed arithmetic device and a method of elliptic curve codes. The invention mainly aims to a master curve, the elliptic curve of which is 160-256 bit of die length and the prime field of which is on Fp. The high speed arithmetic device is a special hardware structure based on a water running pulsate double modular multiplier; the hardware structure comprises an operation part, a control part and a storage part, wherein the operation part comprises two parallel water running pulsate modular multipliers and two groups of adders. Based on the specific hardware structure, point addition and point double water running operation sequences of modified Jacobi coordinate projective joints are rearranged, and point addition and point double operations which sequentially appear in succession are connected end to end; and the vacant times of the double modular multipliers are mutually complemented, thus increasing the hardware efficiency of the water running pulsate modular multipliers and causing the point addition operation to only occupy seven modular multiplication operation cycles and the point double operation to occupy four modular multiplication operation cycles, and drastically reducing clock periodic numbers of the point addition and / or point double and point multiplication operation.

Description

technical field [0001] The present invention generally relates to elliptic curve cryptography technology, and more specifically, relates to a high-speed operation method and integrated circuit of elliptic curve cryptography. Background technique [0002] 1. Elliptic curve cryptography [0003] In 1985, Koblitz and Victor Miller independently proposed the Elliptic Curves Cryptosystem (ECC for short), whose security is based on the Elliptic Curve Discrete Logarithm Problem (ECDLP for short). . [0004] In 1976, W. Diffie and M. Hellman proposed public key cryptography for the key distribution and management of symmetric cryptography. The first widely used public key cryptography is RSA proposed by R.Rivest, A.Shamir and L.Adleman. Its security is based on the mathematical problem of factoring large integers. The algorithmic time complexity of the large integer factorization problem involved in RSA is sub-exponential; the algorithmic time complexity of the discrete logarithm...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06F7/72H04L9/30
Inventor 张学鹏袁航郭中和
Owner BEIJING HUADA INFOSEC TECH
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