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Determinant linear array coordinate scanning circuit

A scanning circuit and determinant technology, which is applied in the field of determinant linear array coordinate scanning circuit, can solve the problems of difficult implementation, limited scanning lines, occupying MPU processing time, etc., and achieve the effects of good versatility, simple design and convenient implementation

Inactive Publication Date: 2010-07-28
UNIV OF ELECTRONICS SCI & TECH OF CHINA ZHONGSHAN INST
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

This method needs to take up extra MPU processing time in order to respond to the input; another general chip scanning method is to use a general keyboard interface chip such as 8279, but such chips often require relatively complicated settings, and the supported row and column scan lines are also very limited
In electronic systems controlled by non-program software, the above two methods are even more difficult to implement.

Method used

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  • Determinant linear array coordinate scanning circuit
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  • Determinant linear array coordinate scanning circuit

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Embodiment Construction

[0034] see figure 1 , the present invention is a determinant linear array coordinate scanning circuit, which includes: an m-channel pulse distribution circuit 1, a keystroke event discrimination circuit 2, a row and column signal filter shaping and coordinate latch signal generation circuit 3, and a row and column coordinate encoding circuit 4 and a row and column coordinate value storage circuit.

[0035] figure 1 The shown m×n matrix button circuit 6 is a line array structure in which m row lines and n column lines are arranged horizontally and vertically, wherein m and n are natural numbers. The connected buttons, so there are m×n buttons in total, and the line port R 0 ~R m-1 It is the input terminal of the row line, which is also the input terminal of the scanning signal; the column line port L 0 ~ L n-1 It is the output terminal of the column line, that is, the output terminal of the scanning signal; the n column lines are respectively connected to the power supply ...

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PUM

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Abstract

The invention discloses a determinant linear array coordinate scanning circuit, comprising an m-channel pulse distribution circuit, a key press event judging circuit, a determinant signal filter shaping and coordinate latch signal generating circuit, a determinant coordinate coding circuit and a determinant coordinate value storage circuit. The m-channel pulse distribution circuit sequentially outputs low level at a line port of an m*n matrix key press circuit, a key press event indicating circuit judges the occurrence of the key press event according to the high and low level at a row port, the determinant coordinate coding circuit 4 codes the line port and the row port to the determinant coordinate according to the current state value, after the key press event indicating signal is generated, the output result of the current determinant coordinate coding circuit is latched in the coordinate value storage circuit by using the latch signal generated by the determinant signal filter shaping and coordinate latch signal generating circuit, and the determinant coordinate value of the coordinate value storage circuit is the coordinate of the key currently pressed. The determinant linear array coordinate scanning circuit has the advantages of concise design, convenient implementation, low hardware cost and no loss of generality.

Description

[technical field] [0001] The invention relates to the field of electronic circuits, in particular to a determinant linear array coordinate scanning circuit of electronic equipment. [Background technique] [0002] The determinant line array button structure circuit is a line array structure in which m row lines and n column lines are arranged horizontally and vertically. At the intersection of row lines and column lines, there are buttons that can connect them, so that there are m×n A button is often used to measure the position or coordinates of the point of external force in the plane. This structure is widely used in electronic equipment applications such as plane contact positioning and matrix keyboards. When the external force acts on the line array interval, the row line and the column line corresponding to the action point are short-circuited. The position of the point of action is converted into a digital coordinate signal generally using a scanning method. Tradition...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H03M11/00H03M11/20G06F3/02
Inventor 李文生邓春健
Owner UNIV OF ELECTRONICS SCI & TECH OF CHINA ZHONGSHAN INST
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