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Microprocessor and method for limiting access

A microprocessor and buffer technology, which is applied in the fields of electrical digital data processing, instruments, memory systems, etc., can solve the problems of instruction failure and inability to read/write the special module buffer.

Active Publication Date: 2010-10-27
VIA TECH INC
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

If the value of the access key is incorrect, the RDMSR / WRMSR command will fail (fail), and the processor cannot read / write to the specified special module register

Method used

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  • Microprocessor and method for limiting access
  • Microprocessor and method for limiting access
  • Microprocessor and method for limiting access

Examples

Experimental program
Comparison scheme
Effect test

Embodiment

[0038] In order to solve the above-mentioned problems, embodiments of the present invention provide an access key method by having each processor have a different access key. Therefore, even if a specific processor's access key is disclosed, the potential risk will be limited to that specific processor.

[0039] refer to figure 1 , figure 1 A microprocessor 100 according to an embodiment of the invention is shown. figure 1 The microprocessor 100 includes a plurality of MSRs (MSRs) 132 , a manufacturing identifier 134 , a key 136 and an MSR password 138 , all of which are received by an execution unit 632 .

[0040] Part of the module-specific registers 132 is protected by a password, while another part of the module-specific registers 132 is not protected by a password. In one embodiment, microcode read-only memory (ROM) 604 stores a list of password-protected module-specific registers 132, where the microcode considers when To execute the RDMSR / WRMSR instruction. In one ...

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PUM

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Abstract

A microprocessor is provided with a control cache for a manufacturer to limit access. A manufacturer identifier is arranged for identifying the manufacturer. A user can read the manufacturer identifier from the exterior of the microprocessor. A key is arranged inside the microprocessor and can not be seen from outside. Corresponding to an order of the user, an encrypting engine is arranged for decoding a password provided by the user through the key, so as to generate a decoding result. The order of the user indicates the microprocessor to access the control cache and the password provided bythe user is specific to the microprocessor. When the decoding result contains the manufacturer identifier, an execution unit allows the order of the user to access the control cache, or refuses.

Description

technical field [0001] The present invention relates to a Model Specific Register (MSR) in a microprocessor, especially related to the restricted access of a user to a Model Specific Register. Background technique [0002] Processors have many internal control registers, which are usually only accessible by microcode. Take the bus control register as an example, which can control detailed actions such as timing on the processor bus, the exact bus protocol to be used, and so on. When testing and debugging a system with a working processor, the tester / debugger usually wants to be able to execute an external program to set (or read) the control registers inside the processor. For example, a tester / debugger may want to try different timings on the processor bus. In addition, it is also often desirable to access the internal registers of these processors as part of a manufacturing test program. [0003] The x86 architecture, for example, has an instruction set that includes a ...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06F9/34G06F21/00G06F21/31
Inventor G·葛兰·亨利泰瑞·派克斯
Owner VIA TECH INC
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