Structured circuit simulation system, selection method and device of clock reference thereof

A clock reference and circuit simulation technology, applied in time division multiplexing systems, transmission systems, synchronization devices, etc., can solve the problems of affecting clock synchronization, the reference cannot be switched, and the circuit of the chip cannot be changed, so as to achieve convenient switching and simplification. Effects of configure operations

Active Publication Date: 2010-11-24
ZTE CORP
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0005] 1) In engineering, it is uncertain whether to extract the clock from the E1 / T1 line or use the recovered clock on the PSN side as the clock reference, and once the circuit of the chip is connected, it cannot be changed at the engineering site;
[0006] 2) When the slave PW clock is selected as the reference, if the PW service fails, the chip will output a free-oscillating clock, causing the reference to fail to switch and affecting global clock synchronization

Method used

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  • Structured circuit simulation system, selection method and device of clock reference thereof
  • Structured circuit simulation system, selection method and device of clock reference thereof
  • Structured circuit simulation system, selection method and device of clock reference thereof

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Embodiment Construction

[0041] The present invention proposes a flexible clock reference selection scheme, which is mainly reflected in three aspects. First, each alternative clock source can control whether to output according to the business situation, so as to facilitate the switching of the active and standby clock references; second, the clock reference It is configurable whether to select from the E1 / T1 line side or the clock side recovered from the PW, which increases the flexibility in engineering; thirdly, the first clock input is fixedly selected as the main clock reference, and the second clock input is selected The input serves as an alternate clock reference, simplifying chip configuration.

[0042] The clock reference selection method provided by the present invention includes:

[0043] One (for example, the first) TDM clock input of the device with circuit simulation function is fixed as the main clock reference input, and the other (for example, the second) TDM clock input of the devi...

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Abstract

The invention provides a selection device of clock reference in a structured circuit simulation system, which is used for receiving a multi-channel circuit clock and a multi-channel pseudowire (PW) clock, selecting one channel from the multi-channel circuit clock or the multi-channel PW clock as the main clock reference to output, and selecting one channel from the multi-channel circuit clock or the multi-channel PW clock as the standby clock reference to output. The invention further provides a selection method of the clock reference in the structured circuit simulation system. The invention can flexibly select to extract a clock from a circuit as a reference or to extract some PW recovery clock from a PSN side as a reference.

Description

technical field [0001] The present invention relates to CESoP (Circuit Emulation Service over Packet) technology in the technical field of telecommunications, and more specifically, relates to a structured circuit emulation system and a method and device for selecting a clock reference. Background technique [0002] With the rapid development of IP technology and the surge of data services, IP-based telecommunication networks have gradually become an inevitable trend in future development. However, traditional circuit-switching-based Time Division Multiplexing (TDM, Time Division Multiplexing) service networks still exist in large numbers. How to bear the traditional TDM service on the new generation PSN (Packet Switch Network) is a problem that must be solved in the development of the current telecommunication network. Circuit emulation (CESoP) technology based on packet network is a good solution. [0003] CESoP is divided into unstructured circuit simulation technology ...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H04J3/06H04L7/00H04L7/033H04L12/56
CPCH04B3/40H04J3/0632
Inventor 戴厚恩
Owner ZTE CORP
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