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Method for executing dynamic allocation command on embedded heterogeneous multi-core

A heterogeneous multi-core, dynamic allocation technology, applied in the computer field, can solve the problems of complex thread scheduling and program performance degradation, and achieve the effect of improving execution efficiency, reducing complexity, and reducing thread synchronization overhead.

Inactive Publication Date: 2010-12-22
SHANGHAI JIAO TONG UNIV
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  • Abstract
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  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, this method needs to consider data dependencies. In fact, it is difficult to divide serially executed programs into parallel multithreaded tasks. In addition, due to the data dependencies of different threads, issues such as data synchronization and cache consistency need to be considered. It will make thread scheduling more complicated, resulting in further degradation of program performance

Method used

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  • Method for executing dynamic allocation command on embedded heterogeneous multi-core
  • Method for executing dynamic allocation command on embedded heterogeneous multi-core

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Experimental program
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Embodiment

[0032] Such as figure 1 As shown, this embodiment includes the following steps:

[0033] In the first step, in the process of loading the binary code program, the binary code program is divided to obtain several basic blocks.

[0034] The division process is to use the program between the ith entry instruction and the i+1 jump instruction as the i+1 basic block, wherein: 0≤i, the entry instruction is the instruction to which the jump instruction goes Or the instruction immediately following the jump instruction.

[0035] In this embodiment, according to the jump instruction of the binary program code, the entry instruction and the exit instruction of the basic block are defined, and each basic block is a group of sequentially executed instruction sequences, and the instruction code between the entry instruction and the exit instruction is divided into a basic block . The entry instruction of the basic block is the first instruction of the basic block, that is, the instructi...

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Abstract

The invention discloses a method for executing a dynamic allocation command on embedded heterogeneous multi-core in the technical field of computers. The method comprises the following steps of: partitioning a binary code program to obtain a plurality of basic blocks; respectively selecting each basic block so as to obtain a target processing core for executing each basic block; translating a basic block which corresponds to the obtained target processing core so as to obtain a translated binary code on the target processing core; and performing statistics on execution frequency of each basicblock, marking a basic block of which the execution frequency is greater than a threshold value T as a hot-spot basic block, and caching the translated binary code of the hot-spot basic block into the cache. The method dynamically allocates commands onto each heterogeneous multi-core to be executed according to the processing capacity and load condition of the system multi-core and the like, so that the method overcomes the defect that static scheduling cannot dynamically allocate resources and also reduces the complexity of dynamic thread division. Therefore, the execution efficiency of the program on the heterogeneous multi-core is further improved.

Description

technical field [0001] The invention relates to a method in the field of computer technology, in particular to a method for executing dynamic allocation instructions on embedded heterogeneous multi-cores. Background technique [0002] In recent years, due to people's higher and higher requirements for computing power, the processing power of CPU also needs to be further improved. Initially, improving the performance of the CPU was mainly achieved by increasing the main frequency and front-side bus frequency and expanding the cache. However, increasing the main frequency poses a great challenge to CPU power consumption and heat dissipation. Simply expanding the cache also requires increased costs. The development of single-core processors has reached a limit. In order to further improve the processing capability of the CPU, multi-core processor technology gradually enters the market. Since 2006, companies such as Intel and AMD have released multi-core processors such as dua...

Claims

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Application Information

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IPC IPC(8): G06F9/50G06F15/16
Inventor 过敏意娄林伍倩朱寅沈耀马曦唐飞龙
Owner SHANGHAI JIAO TONG UNIV
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