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Space optimization method for priority bitmap algorithm

An optimization method and priority technology, applied in the direction of multi-programming devices, etc., can solve problems such as increased time consumption of PBA scheduling, PBA space complexity, PBA expansion dilemma, and complex table lookup process, so as to reduce algorithm time consumption and improve The effect of real-time scheduling capabilities

Inactive Publication Date: 2012-12-19
SOUTHWEST JIAOTONG UNIV
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0027] (3): The space complexity of PBA and the expansion dilemma of PBA
Although the space complexity is further reduced, the table lookup process in this scheme is more complicated, which further deteriorates the real-time scheduling performance of PBA
[0039] To sum up, although literature A and literature B reduce the space complexity of PBA to a certain extent, these improvements are all at the cost of complicating the table lookup process and increasing the time-consuming of PBA scheduling. worsens the real-time scheduling performance of PBA

Method used

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  • Space optimization method for priority bitmap algorithm
  • Space optimization method for priority bitmap algorithm
  • Space optimization method for priority bitmap algorithm

Examples

Experimental program
Comparison scheme
Effect test

Embodiment 1

[0065] Consider a PBA that supports 64 priorities: n=8, m=4, k=3. Then the input signal is A 7 ~A 0 , the output signal is B 2 ~B 0 . According to the above algorithm generated "A x "As follows:

[0066] output signal

4 "A x "x"

B 0

1 3 5 7

B 1

2 3 6 7

B 2

4 5 6 7

[0067] So alternative combinational logic circuits are:

[0068] B 0 = A 1 A 0 ‾ + A 3 A 2 ‾ A 1 ‾ A 0 ‾ + A 5 A 4 ‾ A ...

Embodiment 2

[0072] Consider a PBA that supports 1024 priorities: n=32, m=16, k=5. Then the input signal is A 31 ~A 0 , the output signal is B 4 ~B 0 . According to the above algorithm generated "A x "As follows:

[0073]

[0074] So alternative combinational logic circuits are:

[0075] B 0 = A 1 A 0 ‾ + A 3 A 2 ‾ A 1 ‾ A 0 ‾ + A 5 A 4 ‾ A 3 ‾ A 2 ‾ A ...

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Abstract

The invention discloses a space optimization method for a priority bitmap algorithm (PBA). In an embedded system, the method supports multi-priority and multi-task real-time scheduling and is characterized in that: a priority decision table is substituted by a combined logic circuit. In the method, the priority decision table OSUnMapTb1 is substituted by the combined logic circuit according to determinacy on a content of the priority decision table OSUnMapTb1, an address signal for reading data from the OSUnMapTb1 by using the original PBA and read data are mapped to be an input signal and anoutput signal of the combined logic circuit respectively, and the scheduling time consumption is reduced and the real-time scheduling capacity of the PBA is improved while the space complexity of thePBA is reduced to be O(I) by the method.

Description

Technical field [0001] The invention belongs to embedded system application, especially the technical field of real-time scheduling algorithm. Background technique [0002] Priority Bitmap Algorithm (PBA-Priority Bitmap Algorithm) is a key algorithm supporting multi-priority and multi-tasking in the embedded operating system μC / OS-II. Its core idea is "space for time", that is, to increase storage space The cost is in exchange for efficient and stable scheduling. The characteristic of PBA is: for a certain priority scale, the time-consuming of the PBA algorithm is a fixed value, that is, it has nothing to do with the number of tasks in the ready queue, which enables PBA to ensure that the search process for the highest priority task is completed within a certain time , avoiding uncertainty about the response time of real-time tasks. The disadvantage of PBA is that the space complexity is too high, which makes it very expensive to expand PBA to support more priorities, and ...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G06F9/46
Inventor 申志军曾华燊
Owner SOUTHWEST JIAOTONG UNIV