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Semiconductor chip encapsulation structure and encapsulation method

A chip packaging structure and chip packaging technology, applied in the direction of semiconductor devices, semiconductor/solid-state device manufacturing, semiconductor/solid-state device components, etc., can solve the problems of high cost, inability to reduce the area of ​​the package body, and complex packaging methods. Improved electrical performance, improved flexibility and effectiveness, and simplified packaging process

Inactive Publication Date: 2011-04-20
SEMICON MFG INT (SHANGHAI) CORP
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Problems solved by technology

[0010] However, the above-mentioned packaging method is relatively compl

Method used

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  • Semiconductor chip encapsulation structure and encapsulation method
  • Semiconductor chip encapsulation structure and encapsulation method
  • Semiconductor chip encapsulation structure and encapsulation method

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[0033] The present invention has through holes on the die pad, and the through holes are located at the edge of the die pad, so that subsequent chips mounted on both sides of the die pad can be placed in the same direction. Therefore, the internal wiring of the chips on both sides of the die pad is symmetrical, so that the semiconductor The chip packaging process is simplified, which improves the flexibility and effect of the manufacturing process; the through holes on the die pad are used, and the bonding wire can be connected up, down, left, and right, which is equivalent to providing a multi-layer connection surface function, which greatly reduces manufacturing cost. In addition, the bonding wires pass through the through holes to electrically connect the signal pads on the front-mounted chip with the lead frame, without the need to form other conductive layers on the die pads, which not only reduces manufacturing costs, but also achieves low function / grounding Impedance imp...

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Abstract

The invention relates to a semiconductor chip encapsulation structure and an encapsulation method. The semiconductor chip encapsulation structure comprises a lead frame and a forward chip. The lead frame comprises a tube core pad and a lead arranged on the periphery of the tube core pad. A through hole corresponding to a lead is arranged on the tube core pad and arranged on the periphery of the tube core pad. The surface of the common chip, opposite to a substrate, is glued with the tube core pad, and a signal solder pad on the forward chip is electrically connected with the lead frame by penetrating a bonding wire through the through hole. The semiconductor chip encapsulation structure invention not only has reduced manufacture cost, but also can obtain low functional/grounding impedance and improves the electrical properties of devices.

Description

technical field [0001] The invention relates to a semiconductor chip package structure and a package method. Background technique [0002] As the demand for miniaturization, light weight and multi-functionalization of electronic components increases day by day, the packaging density of semiconductors increases continuously. Therefore, it is necessary to reduce the size of the package and the area occupied by the package. Among the technologies developed to meet the above requirements, the semiconductor chip packaging technology makes a profound contribution to the overall cost, performance and reliability of the packaged chip. [0003] However, in the semiconductor chip packaging process, due to the packaging of the front-mounted chip, it is necessary to use an adhesive to connect the front-mounted chip and the lead frame, and it needs to be packaged by wire bonding, and the wire-bonded type package has a long electrical connection path , so thermal and electrical character...

Claims

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Application Information

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IPC IPC(8): H01L23/495H01L23/48H01L21/50H01L21/60
CPCH01L2924/19107H01L2224/49171H01L2924/3011H01L2224/48091H01L2924/00014H01L2924/00
Inventor 王津洲
Owner SEMICON MFG INT (SHANGHAI) CORP
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