Reconfigurable processing device and system

A processing device and processing system technology, which is applied to machine execution devices, architectures with multiple processing units, general-purpose stored program computers, etc.

Active Publication Date: 2011-05-04
IND TECH RES INST
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, for programs that process files, VLIW or SIMD architecture processors may not necessarily be able to obtain the above advantages
Therefore, if the configuration of the processing device can be changed according to different requirements, the performance of the processing device can be improved.

Method used

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  • Reconfigurable processing device and system
  • Reconfigurable processing device and system

Examples

Experimental program
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Embodiment Construction

[0098] Exemplary embodiments of the present invention provide a variety of reconfigurable processing devices. Multiple processing units in these reconfigurable processing devices will be set to some VLIW based on the data stored in the configuration memory. Or group in SIMD mode, the processing units that are not grouped can work independently and become some independent SISD or MIMD. Therefore, these reconfigurable processing devices can have VLIW, SIMD and independent SISD or MIMD architectures at the same time, so as to meet the requirements of different programs, and improve the performance of executing instructions and the speed of processing data.

[0099] In order to deal with the command asynchronous problem caused by unexpected stall, the above-mentioned reconfigurable processing device has a command synchronization control circuit. The instruction synchronous control circuit can receive a plurality of pause request output signals from each processing unit, and genera...

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Abstract

The invention relates to a reconfigurable processing device and system. The reconfigurable processing device comprises a plurality of processing units, at least one command synchronization control circuit and at least one group of configurable storages, wherein each processing unit is provided with a suspend demand output signal generating circuit which is used for outputting a suspend demand output signal, wherein the suspend demand output signal is used for showing that non-expected suspend execution is happened on the processing units; the processing units are additionally provided with suspend demand input signals, and circuits except the processing units control whether the processing units are subjected to the suspend execution by using the suspend demand input signals; and the command synchronization control circuit generates suspend demand input signals of the processing units according to the contents stored by the configurable storage and the suspend demand output signals ofthe processing units and then determines the command synchronization and the working mode among the processing units.

Description

technical field [0001] The present invention relates to a processing device for electronic products, in particular to a configurable (Configurable) processing device with multiple processing units (PU for short) and its system. Background technique [0002] At present, computers or other relatively high-end electronic products all have a central processing unit, which is a processing device for processing data and executing instructions. With the advancement of process technology, processing devices can be miniaturized more and more, and in a single processing device, multiple processing units can also be configured to process data and execute instructions at the same time, for example: dual-core or quad cores introduced by Intel Corporation. Core CPU. [0003] Please refer to Figure 1A , Figure 1A is a system block diagram of a conventional processing device 10, wherein the processing device 10 adopts a single instruction single data (Single Instruction Single Data, SISD...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06F15/80G06F9/38
Inventor 李子芳林建宏梁菁珊王启龙
Owner IND TECH RES INST
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