Array structure of reconfigurable operators

An array structure and operator technology, which is applied in the field of the array structure of reconfigurable operators to achieve the effect of speeding up the design speed

Inactive Publication Date: 2011-08-24
PEKING UNIV SHENZHEN GRADUATE SCHOOL
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, for the finished ASIC, it has fixed functions and cannot be used to implement different applications through repeated programming.

Method used

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  • Array structure of reconfigurable operators
  • Array structure of reconfigurable operators
  • Array structure of reconfigurable operators

Examples

Experimental program
Comparison scheme
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Embodiment Construction

[0023] The present invention will be further described in detail below through specific embodiments in conjunction with the accompanying drawings.

[0024] The array structure involved in the present invention includes logic units for realizing logic functions, connection units for realizing connection relations, and input and output units for realizing communication with external signals. The configuration information is loaded into the array structure through the input and output unit, and the logic function of the logic unit and the connection relationship of the connection unit are configured, so that the array structure has programmability. Attached below Figures 1 to 6 The specific implementation process of the present invention is described in detail:

[0025] Please refer to figure 1 , an array structure 100 of a reconfigurable operator, including a logic unit, a connection unit, and an input and output unit. The input and output units are distributed around the lo...

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PUM

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Abstract

The invention discloses an array structure of reconfigurable operators, comprising a logic unit for implementing logic function, a connection unit for implementing connection function and an input/output unit for implementing external communication, wherein the logic unit comprises a plurality of reconfigurable operators; the connection unit comprises interconnection resource and configuration nodes with switching characteristic, the reconfigurable operators are interconnected through the interconnection resource, and the connection path between every reconfigurable operator and the interconnection resource is provided with the configuration node. Particular functions are implemented in the array structure by fixing the function of every reconfigurable operator and the connection relationship of all the reconfigurable operators in a manner of programming the array structure, and the array structure includes excellent programmability and expansibility.

Description

technical field [0001] The invention relates to integrated circuits, in particular to an array structure of reconfigurable operators. Background technique [0002] In integrated circuit design, there are various design methods such as fully customized ASIC (Application Specific Integrated Circuit, application specific integrated circuit) and FPGA (Field programmable gate array, field programmable gate array). Reasonable use of different design methods can realize various applications in the fields of communication, computer, and consumer electronics, and at the same time make the hardware carrying various applications meet the performance, power consumption, cost, time, flexibility, and scalability of different applications. aspect requirements. [0003] A fully-customized ASIC is an integrated circuit specially customized to achieve a specific function. In practice, the user usually submits the specific function that needs to be realized to the design company in the form ...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06F17/50
Inventor 王新安雍珊珊蓝晶吴承昊龙晓波
Owner PEKING UNIV SHENZHEN GRADUATE SCHOOL
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