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Scanning chain balancing method for carrying out secondary allocation by utilizing difference value

A secondary allocation and scanning chain technology, applied in the direction of measuring devices, instruments, measuring electronics, etc., can solve the problems that the BFD algorithm does not have global optimization, and the guiding principle of global optimization is not close to the actual situation, so as to achieve simple implementation and high algorithm complexity low effect

Active Publication Date: 2013-05-01
HARBIN INST OF TECH
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  • Application Information

AI Technical Summary

Problems solved by technology

The disadvantage of this method is: BFD algorithm does not have the ability of global optimization
[0005] In addition, the above-mentioned Wrapper scan chain balance algorithm based on the average value to realize the SOC test method does not always give priority to the current longest internal scan chain, which brings many disadvantages.
Although this method has the ability of global optimization, it does not always give priority to the current longest internal scan chain, and its guiding principle of global optimization is not close to the actual situation

Method used

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  • Scanning chain balancing method for carrying out secondary allocation by utilizing difference value
  • Scanning chain balancing method for carrying out secondary allocation by utilizing difference value
  • Scanning chain balancing method for carrying out secondary allocation by utilizing difference value

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specific Embodiment approach 1

[0012] Embodiment 1: Combining figure 1 To illustrate this embodiment, the process of the scan chain balancing method using the difference for secondary allocation in this embodiment is as follows:

[0013] First, arrange the scan chains inside the IP core in descending order, find the largest scan chain S(max), divide the largest scan chain S(max) by the length of the adjustment coefficient adj as the reference length, and the one closest to the reference length The scan chain is set as the reference scan chain S(adj);

[0014] Then, compare the length of each scan chain inside the IP core with the length of the reference scan chain S(adj). If the scan chain S(adj) is larger than the reference, it is set as long scan chain S>, and the scan chain is less than or equal to the reference. S(adj) is set as the short scan chain S≤, and all long scan chains S> are allocated for the first time according to the length of the reference scan chain S(adj); and then each long scan chain ...

specific Embodiment approach 2

[0031] Embodiment 2: This embodiment is a special case of Embodiment 1, a special case of the adjustment coefficient adj>S(max) / S(min):

[0032] First, arrange the scan chains inside the IP core in descending order, find the largest scan chain S(max), divide the largest scan chain S(max) by the length of the adjustment coefficient adj less than the smallest scan chain S(min), The length less than the minimum scan chain S(min) is used as the reference length;

[0033] Then, all the scan chains are allocated for the first time according to the length of the reference scan chain S(adj); then calculate the difference di between all scan chains and the smallest scan chain S(min), and change the difference di' from large to large After the small sort, the second allocation is performed.

[0034] The following provides pseudo-codes for implementing the method described in this embodiment (denoted as TAD(MIN)):

[0035] Suppose: the number of internal scan chains of the IP core is n...

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Abstract

The invention discloses a scanning chain balancing method for carrying out secondary allocation by utilizing a difference value, which relates to the technical field of SOC (System On Chip) test. The method aims to shorten the test time of SOC so as to reduce the test cost. The method comprises the following steps of: firstly, arranging all scanning chains in an IP (Internet Protocol) core in descending order, finding out a maximal scanning chain (max), dividing the maximal scanning chain (max) by the length of an adjustment coefficient adj for being used as a reference length and setting thescanning chain which approaches the reference length as much as possible as a reference scanning chain S (adj); then comparing the lengths of all the scanning chains in the IP core with the length ofreference scanning chain S (adj); setting the scanning chain which is larger than the reference scanning chain S (adj) as a long scanningchain S> and setting the scanning chain which is smaller than and equal to the reference scanning chain S (adj) as a short scanning chain S<=; carrying out first allocation on all the long scanning chains S> according to the length of the reference scanning chain S (adj); calculating a difference value di' between each long scanning chain S> and the reference scanning chain S (adj); and after arranging all the short scanning chains S<= and all difference values di' in descending order, carrying out secondary allocation. The method is applied to integrated circuits.

Description

technical field [0001] The invention relates to the technical field of system chip SOC testing. Background technique [0002] SOC (system-on-a-chip) based on IP core multiplexing has become the mainstream technology of today's electronic equipment, which greatly shortens the time to market of products and improves the stability of the system. However, it has brought great challenges to the test, mainly in the following aspects: the ports of the IP core embedded in the SOC are much larger than the pins of the SOC, so it is impossible to directly test and access these IP cores; as the complexity of the IP core increases , the test time for SOC is also doubled, which in turn leads to a rapid increase in test cost, and is close to the manufacturing cost of SOC. The test problem has become a bottleneck restricting the development of SOC, so effective measures must be taken. Since the input and output pins of the IP core embedded in the SOC cannot all be connected to the pins of...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G01R31/3185
Inventor 邓立宝俞洋乔立岩付宁彭喜元
Owner HARBIN INST OF TECH
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